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IPD50N06S4L12

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Infineon Technologies MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistoripd50n06s4l12factory-2.0.0extractor-text

Verified IPD50N06S4L12

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier lcsc, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: IPD50N06S4L12 · TO-252 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 9-page datasheet
  • •distributor (warn): no ['digikey'] number
  • ✓family: TO-252-2
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ilybc9r4/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ipd50n06s4l12.kicad_sym✓ ipd50n06s4l12.kicad_mod✓ ipd50n06s4l12.step
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3D Model

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Symbol & Footprint

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Contents

README

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IPD50N06S4L12

Infineon Technologies · MOSFETs · TO-252

IPD50N06S4L12 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the N-channel enhancement-mode MOSFET, with a maximum gate-source voltage of ±16 V and threshold of 1.2 to 2.2 V.
2 Drain passive Drain terminal (pin 2, connected to the tab), rated for 60 V drain-source and 50 A continuous drain current at TC=25°C.
3 Source passive Source terminal of the MOSFET, carrying up to 50 A continuous current at TC=25°C.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-252
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 60 V VGS=0V, ID=1mA 2
Gate threshold voltage VGS(th) 1.2 1.7 2.2 V VDS=VGS, ID=20µA 2
Zero gate voltage drain current IDSS 0.01 1 µA VDS=60V, VGS=0V, Tj=25°C 2
Zero gate voltage drain current IDSS 5 100 µA VDS=60V, VGS=0V, Tj=125°C 2
Gate-source leakage current IGSS 100 nA VGS=16V, VDS=0V 2
Drain-source on-state resistance RDS(on) 14.6 21.6 mΩ VGS=4.5V, ID=25A 2
Drain-source on-state resistance RDS(on) 9.6 12 mΩ VGS=10V, ID=50A 2
Input capacitance Ciss 2220 2890 pF VGS=0V, VDS=25V, f=1MHz 3
Output capacitance Coss 540 700 pF VGS=0V, VDS=25V, f=1MHz 3
Reverse transfer capacitance Crss 27 54 pF VGS=0V, VDS=25V, f=1MHz 3
Gate to source charge Qgs 9 12 nC VDD=48V, ID=50A, VGS=0 to 10V 3
Gate to drain charge Qgd 3 6 nC VDD=48V, ID=50A, VGS=0 to 10V 3
Gate charge total Qg 30 40 nC VDD=48V, ID=50A, VGS=0 to 10V 3
Diode continuous forward current IS 50 A TC=25°C 3
Diode pulse current IS,pulse 200 A TC=25°C 3
Diode forward voltage VSD 0.6 0.95 1.3 V VGS=0V, IF=50A, Tj=25°C 3
Thermal resistance, junction-case RthJC 3 K/W 2
Thermal resistance, junction-ambient, minimal footprint RthJA 62 K/W SMD version, device on PCB, minimal footprint 2
Thermal resistance, junction-ambient, 6 cm2 RthJA 40 K/W SMD version, device on PCB, 6 cm2 cooling area 2
Continuous drain current ID 50 A TC=25°C, VGS=10V 1
Continuous drain current ID 36 A TC=100°C, VGS=10V 1
Pulsed drain current ID,pulse 200 A TC=25°C 1
Avalanche energy, single pulse EAS 33 mJ ID=25A 1
Avalanche current, single pulse IAS 50 A 1
Gate source voltage VGS -16 16 V 1
Power dissipation Ptot 50 W TC=25°C 1
Operating and storage temperature Tj, Tstg -55 175 °C 1
Turn-on delay time td(on) 6 ns VDD=30V, VGS=10V, ID=50A, RG=3.5Ω 3
Rise time tr 2 ns VDD=30V, VGS=10V, ID=50A, RG=3.5Ω 3
Turn-off delay time td(off) 25 ns VDD=30V, VGS=10V, ID=50A, RG=3.5Ω 3
Fall time tf 5 ns VDD=30V, VGS=10V, ID=50A, RG=3.5Ω 3
Gate plateau voltage Vplateau 4 V VDD=48V, ID=50A, VGS=0 to 10V 3
Reverse recovery time trr 20 ns VR=30V, IF=IS, diF/dt=100A/µs 3
Reverse recovery charge Qrr 19 nC VR=30V, IF=IS, diF/dt=100A/µs 3

CAD (KiCad official)

  • Symbol: IPD50N06S4L12
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ipd50n06s4l12-etched.step / ipd50n06s4l12-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipd50n06s4l12.step / ipd50n06s4l12.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 ce5816c5bd4ef201, retrieved 2026-10-31, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF