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IPD50N06S4-09

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Infineon Technologies MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IPD50N06S4-09

Infineon Technologies · MOSFETs · TO-252

IPD50N06S4-09 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate pin; gate-source voltage limited to ±20 V, with a gate threshold of 2.0 to 4.0 V at ID=34µA.
2 D passive Drain pin, also connected to the Tab; VDS 60 V, continuous drain current 50 A at TC=25°C, pulsed 200 A.
3 S passive Source pin; carries the 50 A continuous current at TC=25°C and the body diode forward current.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous drain current (T_C=25°C) I_D 50 A T_C=25°C, V_GS=10V 1
Continuous drain current (T_C=100°C) I_D 47 A T_C=100°C, V_GS=10V 1
Pulsed drain current I_D,pulse 200 A T_C=25°C 1
Avalanche energy, single pulse E_AS 87 mJ I_D=25A 1
Avalanche current, single pulse I_AS 50 A 1
Gate source voltage V_GS -20 20 V 1
Power dissipation P_tot 71 W T_C=25°C 1
Operating and storage temperature T_j, T_stg -55 175 °C 1
Thermal resistance, junction - case R_thJC 2.1 K/W 2
Thermal resistance, junction - ambient, SMD on PCB, minimal footprint R_thJA 62 K/W SMD version, device on PCB, minimal footprint 2
Thermal resistance, junction - ambient, SMD on PCB, 6 cm2 cooling area R_thJA 40 K/W SMD version, device on PCB, 6 cm2 cooling area 2
Drain-source breakdown voltage V(BR)DSS 60 V V_GS=0V, I_D=1mA 2
Gate threshold voltage V_GS(th) 2 3 4 V V_DS=V_GS, I_D=34µA 2
Zero gate voltage drain current I_DSS 0.01 1 µA V_DS=60V, V_GS=0V, T_j=25°C 2
Zero gate voltage drain current I_DSS 5 100 µA V_DS=60V, V_GS=0V, T_j=125°C 2
Gate-source leakage current I_GSS 100 nA V_GS=20V, V_DS=0V 2
Drain-source on-state resistance R_DS(on) 7.1 9 mΩ V_GS=10V, I_D=50A 2
Input capacitance C_iss 2911 3785 pF V_GS=0 V, V_DS=25 V, f=1 MHz 3
Output capacitance C_oss 715 930 pF V_GS=0 V, V_DS=25 V, f=1 MHz 3
Reverse transfer capacitance C_rss 30 60 pF V_GS=0 V, V_DS=25 V, f=1 MHz 3
Gate to source charge Q_gs 17 22 nC V_DD=48V, I_D=50A, V_GS=0 to 10V 3
Gate charge total Q_g 36 47 nC V_DD=48V, I_D=50A, V_GS=0 to 10V 3
Diode continuous forward current I_S 50 A 3
Diode pulse current I_S,pulse 200 A 3
Diode forward voltage V_SD 0.6 0.95 1.3 V V_GS=0V, I_F=50A, T_j=25°C 3

CAD (KiCad official)

  • Symbol: IPD50N06S4-09
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ipd50n06s4-09-etched.step / ipd50n06s4-09-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipd50n06s4-09.step / ipd50n06s4-09.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 e7abcdaa42a3a34c, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF