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IPD50N06S2-14

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UMW MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IPD50N06S2-14

UMW · MOSFETs · TO-252

IPD50N06S2-14 from UMW, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input GATE of the 60 V N-channel MOSFET; the datasheet gives a gate-source voltage absolute maximum of ±20 V.
2 D passive DRAIN of the 60 V N-channel MOSFET; the datasheet rates the device at VDS 60 V and continuous drain current ID 50 A at TC=25°C.
3 S passive SOURCE of the N-channel MOSFET; the datasheet gives no pin-specific limit, so the device ratings (VDS 60 V, VGS ±20 V) apply.

Key specifications

Parameter Value
Manufacturer UMW
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS 60 V VGS=0V, ID=1mA 2
Gate threshold voltage VGS(th) 2.1 3 4 V VDS=VGS, ID=80µA 2
Continuous drain current ID 50 A TC=25°C, VGS=10V 1
Continuous drain current ID 49 A TC=100°C, VGS=10V 1
Pulsed drain current ID,pulse 200 A TC=25°C 1
Avalanche current, single pulse EAS 240 mJ ID=50A 1
Gate source voltage VGS -20 20 V 1
Power dissipation PD 136 W TC=25°C 1
Storage temperature TJ,TSTG -55 175 °C 1
Thermal resistance, junction-case RthJC 1.1 K/W 1
Thermal resistance, junction-ambient, leaded RthJA 100 K/W 1
Thermal resistance, junction-ambient, SMD version RthJA 75 K/W SMD version, device on PCB, minimal footprint 1
Thermal resistance, junction-ambient, SMD version RthJA 50 K/W SMD version, device on PCB, 6 cm2 cooling area 1
Input capacitance Ciss 1485 pF VGS=0V, VDS=25V, f=1MHz 2
Output capacitance Coss 464 pF VGS=0V, VDS=25V, f=1MHz 2
Reverse transfer capacitance Crss 167 pF VGS=0V, VDS=25V, f=1MHz 2
Turn-on delay time tD(on) 13 ns VDD=30V, VGS=10V, ID=50A, RG=7.5Ω 2
Rise time tr 29 ns VDD=30V, VGS=10V, ID=50A, RG=7.5Ω 2
Turn-off delay time tD(off) 30 ns VDD=30V, VGS=10V, ID=50A, RG=7.5Ω 2
Fall time tf 19 ns VDD=30V, VGS=10V, ID=50A, RG=7.5Ω 2
Gate to source charge Qgs 8 nC VDD=44V, ID=50A, VGS=0 to 10V 2
Gate to drain charge Qgd 16 nC VDD=44V, ID=50A, VGS=0 to 10V 2
Gate charge total Qg 39 nC VDD=44V, ID=50A, VGS=0 to 10V 2
Gate plateau voltage Vplateau 5.4 V 2

CAD (KiCad official)

  • Symbol: IPD50N06S2-14
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ipd50n06s2-14-etched.step / ipd50n06s2-14-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipd50n06s2-14.step / ipd50n06s2-14.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (9 pp, sha256 e4c44b94c3cbc3fe, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF