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IPD50N03S2L06ATMA1
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Infineon Technologies MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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IPD50N03S2L06ATMA1
Infineon Technologies · MOSFETs · TO-252
IPD50N03S2L06ATMA1 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate (pin 1) of the N-channel logic-level MOSFET, with maximum gate-source voltage of ±20 V and threshold of 1.2 to 2.0 V. |
| 2 | D | passive | Drain (pin 2, also the tab), rated for 30 V drain-source breakdown and 50 A continuous drain current. |
| 3 | S | passive | Source (pin 3) of the N-channel MOSFET, carrying up to 50 A continuous current. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 30 | 8 | V | VGS=0 V, ID=1 mA | 2 | |
| Gate threshold voltage | VGS(th) | 1.2 | 1.6 | 2 | V | VDS=VGS, ID=85 µA | 2 |
| Zero gate voltage drain current | IDSS | 0.01 | 27 | µA | VDS=30 V, VGS=0 V, Tj=25 °C | 2 | |
| Zero gate voltage drain current | IDSS | 1 | 100 | µA | VDS=30 V, VGS=0 V, Tj=125 °C | 2 | |
| Gate-source leakage current | IGSS | 1 | 100 | nA | VGS=20 V, VDS=0 V | 2 | |
| Drain-source on-state resistance | RDS(on) | 7.6 | 9.2 | mΩ | VGS=4.5 V, ID=50 A | 2 | |
| Drain-source on-state resistance | RDS(on) | 5.1 | 6.4 | mΩ | VGS=10 V, ID=50 A | 2 | |
| Gate to source charge | Qgs | 6 | 8 | nC | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 | |
| Gate to drain charge | Qgd | 16 | 27 | nC | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 | |
| Gate charge total | Qg | 50 | 68 | nC | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 | |
| Diode continuous forward current | IS | 50 | A | TC=25 °C | 3 | ||
| Diode pulse current | IS,pulse | 200 | A | TC=25 °C | 3 | ||
| Diode forward voltage | VSD | 0.9 | 1.3 | V | VGS=0 V, IF=50 A, Tj=25 °C | 3 | |
| Thermal resistance, junction - case | RthJC | 1.1 | K/W | 2 | |||
| Thermal resistance, junction - ambient, leaded | RthJA | 100 | K/W | 2 | |||
| Thermal resistance, junction - ambient, SMD | RthJA | 75 | K/W | minimal footprint | 2 | ||
| Thermal resistance, junction - ambient, SMD | RthJA | 50 | K/W | 6 cm2 cooling area | 2 | ||
| Continuous drain current | ID | 50 | A | TC=25 °C, VGS=10 V | 1 | ||
| Pulsed drain current | ID,pulse | 200 | A | TC=25 °C | 1 | ||
| Avalanche energy, single pulse | EAS | 250 | mJ | ID=50A | 1 | ||
| Gate source voltage | VGS | -20 | 20 | V | 1 | ||
| Power dissipation | Ptot | 136 | W | TC=25 °C | 1 | ||
| Operating and storage temperature | Tj, Tstg | -55 | 175 | °C | 1 | ||
| Drain-source voltage | VDS | 30 | V | Product summary | 1 | ||
| Input capacitance | Ciss | 1900 | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 | ||
| Output capacitance | Coss | 760 | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 | ||
| Reverse transfer capacitance | Crss | 180 | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 | ||
| Turn-on delay time | td(on) | 10 | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 | ||
| Rise time | tr | 30 | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 | ||
| Turn-off delay time | td(off) | 40 | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 | ||
| Fall time | tf | 15 | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 | ||
| Gate plateau voltage | Vplateau | 3.3 | V | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 | ||
| Reverse recovery time | trr | 40 | ns | VR=15 V, IF=IS, diF/dt=100 A/µs | 3 | ||
| Reverse recovery charge | Qrr | 50 | nC | VR=15 V, IF=IS, diF/dt=100 A/µs | 3 |
CAD (KiCad official)
- Symbol:
IPD50N03S2L06ATMA1 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files:
ipd50n03s2l06atma1-etched.step/ipd50n03s2l06atma1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ipd50n03s2l06atma1.step/ipd50n03s2l06atma1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (8 pp, sha256
bfa3e0125935b4a2, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# IPD50N03S2L06ATMA1
**Infineon Technologies** · MOSFETs · TO-252
IPD50N03S2L06ATMA1 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate (pin 1) of the N-channel logic-level MOSFET, with maximum gate-source voltage of ±20 V and threshold of 1.2 to 2.0 V. |
| 2 | D | passive | Drain (pin 2, also the tab), rated for 30 V drain-source breakdown and 50 A continuous drain current. |
| 3 | S | passive | Source (pin 3) of the N-channel MOSFET, carrying up to 50 A continuous current. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 30 | | 8 | V | VGS=0 V, ID=1 mA | 2 |
| Gate threshold voltage | VGS(th) | 1.2 | 1.6 | 2 | V | VDS=VGS, ID=85 µA | 2 |
| Zero gate voltage drain current | IDSS | | 0.01 | 27 | µA | VDS=30 V, VGS=0 V, Tj=25 °C | 2 |
| Zero gate voltage drain current | IDSS | | 1 | 100 | µA | VDS=30 V, VGS=0 V, Tj=125 °C | 2 |
| Gate-source leakage current | IGSS | | 1 | 100 | nA | VGS=20 V, VDS=0 V | 2 |
| Drain-source on-state resistance | RDS(on) | | 7.6 | 9.2 | mΩ | VGS=4.5 V, ID=50 A | 2 |
| Drain-source on-state resistance | RDS(on) | | 5.1 | 6.4 | mΩ | VGS=10 V, ID=50 A | 2 |
| Gate to source charge | Qgs | | 6 | 8 | nC | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 |
| Gate to drain charge | Qgd | | 16 | 27 | nC | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 |
| Gate charge total | Qg | | 50 | 68 | nC | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 |
| Diode continuous forward current | IS | | | 50 | A | TC=25 °C | 3 |
| Diode pulse current | IS,pulse | | | 200 | A | TC=25 °C | 3 |
| Diode forward voltage | VSD | | 0.9 | 1.3 | V | VGS=0 V, IF=50 A, Tj=25 °C | 3 |
| Thermal resistance, junction - case | RthJC | | | 1.1 | K/W | | 2 |
| Thermal resistance, junction - ambient, leaded | RthJA | | | 100 | K/W | | 2 |
| Thermal resistance, junction - ambient, SMD | RthJA | | | 75 | K/W | minimal footprint | 2 |
| Thermal resistance, junction - ambient, SMD | RthJA | | | 50 | K/W | 6 cm2 cooling area | 2 |
| Continuous drain current | ID | | | 50 | A | TC=25 °C, VGS=10 V | 1 |
| Pulsed drain current | ID,pulse | | | 200 | A | TC=25 °C | 1 |
| Avalanche energy, single pulse | EAS | | | 250 | mJ | ID=50A | 1 |
| Gate source voltage | VGS | -20 | | 20 | V | | 1 |
| Power dissipation | Ptot | | | 136 | W | TC=25 °C | 1 |
| Operating and storage temperature | Tj, Tstg | -55 | | 175 | °C | | 1 |
| Drain-source voltage | VDS | | | 30 | V | Product summary | 1 |
| Input capacitance | Ciss | | 1900 | | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 |
| Output capacitance | Coss | | 760 | | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 |
| Reverse transfer capacitance | Crss | | 180 | | pF | VGS=0 V, VDS=25 V, f=1 MHz | 3 |
| Turn-on delay time | td(on) | | 10 | | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 |
| Rise time | tr | | 30 | | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 |
| Turn-off delay time | td(off) | | 40 | | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 |
| Fall time | tf | | 15 | | ns | VDD=15 V, VGS=10 V, ID=50 A, RG=3.6 Ω | 3 |
| Gate plateau voltage | Vplateau | | 3.3 | | V | VDD=24 V, ID=50 A, VGS=0 to 10 V | 3 |
| Reverse recovery time | trr | | 40 | | ns | VR=15 V, IF=IS, diF/dt=100 A/µs | 3 |
| Reverse recovery charge | Qrr | | 50 | | nC | VR=15 V, IF=IS, diF/dt=100 A/µs | 3 |
## CAD (KiCad official)
- Symbol: `IPD50N03S2L06ATMA1`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `ipd50n03s2l06atma1-etched.step` / `ipd50n03s2l06atma1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ipd50n03s2l06atma1.step` / `ipd50n03s2l06atma1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](https://www.infineon.com/dgdl/Infineon-IPD50N03S2L_06-DS-v01_00-en.pdf?folderId=db3a304412b407950112b426f7da3b27&fileId=db3a304412b407950112b4270cfc3b6e&ack=t) (8 pp, sha256 `bfa3e0125935b4a2`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ipd50n03s2l06atma1-datasheet.pdf)