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Contents

README

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IPD034N06N3G

Infineon Technologies · MOSFETs · TO-252

IPD034N06N3G from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate pin 1 of the N-channel OptiMOS 3 MOSFET, with a maximum gate-source voltage of ±20 V.
2 Drain passive Drain pin 2, connected to the tab, for a 60 V drain-source rating and 100 A continuous drain current.
3 Source passive Source pin 3 of the MOSFET, the current return for the 100 A continuous drain current.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-252
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: IPD034N06N3G
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: ipd034n06n3g-etched.step / ipd034n06n3g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipd034n06n3g.step / ipd034n06n3g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 927e9bca83d3e7e2, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF