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ip6525t-n: factory component page (tier=lcsc)

Ray ·f38f99bb97 · ·parent 184fe61
1 file changed +122−8
page.json+122−8
@@ -1,13 +1,132 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ip6525t-n",+  "title": "IP6525T_N",+  "brief": "INJOINIC IP6525T N DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "INJOINIC IP6525T N DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "pmic",     "ip6525t_n"   ],+  "component": {+    "mpn": "IP6525T_N",+    "manufacturer": "INJOINIC IP6525T N",+    "package": "ESOP-8",+    "pin_count": 9,+    "category": "PMIC",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/bce7317d969aafd7e396e7b4a5131754.pdf",+    "parts": {+      "symbol": "ip6525t-n.kicad_sym",+      "footprint": "ip6525t-n.kicad_mod",+      "model_3d": "ip6525t-n.glb",+      "model_3d_step": "ip6525t-n.step",+      "lbr": "ip6525t-n.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "GND",+        "type": "power_in",+        "description": "Power ground. Return path for the internal power stage; must be tied to the exposed pad (EPAD) plane for proper thermal and electrical performance."+      },+      {+        "number": "2",+        "name": "SW",+        "type": "output",+        "description": "DCDC switching node. Connects to the external buck inductor. Absolute-max SW voltage range is -0.3 V to 40 V."+      },+      {+        "number": "3",+        "name": "BST",+        "type": "passive",+        "description": "Bootstrap pin for the high-side gate driver. Connect a bootstrap capacitor between BST and SW (placed close to the IC) to provide the drive voltage for the upper power MOSFET gate."+      },+      {+        "number": "4",+        "name": "HLED/EN",+        "type": "bidirectional",+        "description": "Dual-function pin. Default configuration is HLED (fast-charge status LED indicator drive); optionally can be configured as an external Enable (EN) input via factory customization."+      },+      {+        "number": "5",+        "name": "DM",+        "type": "bidirectional",+        "description": "USB D- (data minus) line used for fast-charge protocol handshaking (DCP/QC2.0/QC3.0/FCP/AFC). Absolute-max voltage range -0.3 V to 30 V."+      },+      {+        "number": "6",+        "name": "DP",+        "type": "bidirectional",+        "description": "USB D+ (data plus) line used for fast-charge protocol handshaking (DCP/QC2.0/QC3.0/FCP/AFC). Absolute-max voltage range -0.3 V to 30 V."+      },+      {+        "number": "7",+        "name": "VIN",+        "type": "power_in",+        "description": "Input supply pin, 9.6 V to 32 V (absolute-max 40 V). Place a decoupling ceramic capacitor (100 nF recommended) close to the IC."+      },+      {+        "number": "8",+        "name": "VOUT",+        "type": "input",+        "description": "Output voltage feedback / sense pin. Used by the internal loop to regulate the buck output (3 V-12 V typical) and provide line-drop compensation (~100 mV @ 1 A)."+      },+      {+        "number": "9",+        "name": "EPAD",+        "type": "power_in",+        "description": "Exposed thermal pad on the bottom of the ESOP-8 package. Serves as power ground and heatsink; must be soldered to a solid GND copper pour for thermal dissipation."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/bce7317d969aafd7e396e7b4a5131754.pdf",+        "pages": 11,+        "sha256": "1376a6951cb2f147",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 9,+        "described": 9,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "INJOINIC IP6525T N",+      "Package": "ESOP-8",+      "Category": "PMIC",+      "Pins": "9"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ip6525t_n"+  ],+  "discovery_pitch": "IP6525T_N (INJOINIC IP6525T N) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +144,5 @@     "docs/ip6525t-n-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file