component
IP6520T_PPS
Public Made by Adomby adom
INJOINIC Battery Management, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 1mo ago |
| viewers | 1mo ago |
| ip6520t-pps-etched.fit.json | 1mo ago |
| ip6520t-pps-etched.glb | 1mo ago |
| ip6520t-pps-etched.step | 1mo ago |
| ip6520t-pps.glb | 1mo ago |
| ip6520t-pps.kicad_mod | 1mo ago |
| ip6520t-pps.kicad_sym | 1mo ago |
| ip6520t-pps.lbr | 1mo ago |
| ip6520t-pps.step | 1mo ago |
| package.json | 1mo ago |
| page.json | 1mo ago |
| README.md | 1mo ago |
IP6520T_PPS
INJOINIC · Battery Management · ESOP-8
IP6520T_PPS from INJOINIC, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | input | Output voltage feedback pin (maximum rating 20V) for buck converter output voltage regulation. |
| 2 | VIN | power_in | Input power supply pin with 7.3V to 32V operating range requiring ceramic filter capacitor placed near IC. |
| 3 | SW | output | Power switch node (maximum 40V) driven at 115kHz by integrated MOSFET drivers and connected to external 22μH filter inductor. |
| 4 | BST | output | Bootstrap circuit pin (maximum 40V) supplying gate drive voltage to high-side synchronous MOSFET through external bootstrap capacitor. |
| 5 | DM | bidirectional | USB Data Minus signal pin (maximum 6V) for fast charger protocol identification and device detection via USB Type-C connector. |
| 6 | DP | bidirectional | USB Data Plus signal pin (maximum 6V) for fast charger protocol identification and device detection via USB Type-C connector. |
| 7 | CC1 | bidirectional | Type-C configuration channel 1 pin (maximum 15V, overvoltage protection at 6.0V) for cable orientation sensing and USB Power Delivery negotiation. |
| 8 | CC2 | bidirectional | Type-C configuration channel 2 pin (maximum 15V, overvoltage protection at 6.0V) for cable orientation sensing and USB Power Delivery negotiation. |
| 9 | PGND | power_in | Power ground and thermal ground pad (0V reference) providing return current path and heat dissipation from IC junction to PCB. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | INJOINIC |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
IP6520T_PPS - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
ip6520t-pps-etched.step/ip6520t-pps-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ip6520t-pps.step/ip6520t-pps.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: INJOINIC datasheet (18 pp, sha256
73bb1f7645bf2ff5, retrieved 2026-09-21, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).