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IP6520_20W

INJOINIC · Battery Management · ESOP-8

IP6520_20W from INJOINIC, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT input Output voltage feedback pin for the buck converter, with the output range stated as 3 V to 12 V; C5 should be placed close to this pin.
2 VIN power_in Input voltage pin with a recommended range of 7.1 V to 32 V (absolute maximum -0.3 V to 40 V), and the input filter capacitor must be placed close to the IC.
3 SW output DC-DC switching node that connects to the inductor; LX voltage is limited to -0.3 V to VIN+0.3 V, and the R1/C6 RC snubber should be placed close to this pin.
4 BST passive Bootstrap pin that provides the high-side gate drive voltage; the bootstrap capacitor must be placed right next to the BST and SW pins, and the datasheet gives no separate voltage limit for this pin.
5 DM bidirectional USB fast-charge identification signal DM, with an absolute maximum of -0.3 V to 6 V and DP/DM overvoltage protection that trips at 4.5 V typical.
6 DP bidirectional USB fast-charge identification signal DP, with an absolute maximum of -0.3 V to 6 V and DP/DM overvoltage protection that trips at 4.5 V typical.
7 CC1 bidirectional Type-C detection pin CC1, with an absolute maximum of -0.3 V to 30 V and a CC overvoltage protection threshold of 6.0 V typical.
8 CC2 bidirectional Type-C detection pin CC2, with an absolute maximum of -0.3 V to 30 V and a CC overvoltage protection threshold of 6.0 V typical.
9 GND power_in Exposed pad (EPAD) that serves as both power and thermal ground and must make good contact with the PCB ground.

Key specifications

Parameter Value
Manufacturer INJOINIC
Package ESOP-8
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (recommended operating) VIN 7.1 32 V 4
Input voltage range (absolute maximum) VIN -0.3 40 V 4
LX voltage range VLX -0.3 V Maximum printed as VIN+0.3 V 4
CC voltage range VCC1/CC2 -0.3 30 V 4
DP/DM voltage range VDP/DM -0.3 6 V 4
Junction temperature range TJ -40 150 ℃ 4
Storage temperature range Tstg -60 150 ℃ 4
Input voltage (electrical table) VIN 7.1 12 32 V 5
Input undervoltage threshold, rising VIN-UV 7.05 7.1 7.2 V 5
Input undervoltage threshold, falling VIN-UV 6.8 6.9 6.95 V 5
Input overvoltage threshold, rising VIN-OV 32.4 32.6 33 V 5
Input overvoltage threshold, falling VIN-OV 31.9 32.1 32.3 V 5
Output voltage ripple, 5V/3A ΔVOUT 80 85 90 mV VIN=12V, VOUT=5V@3A 5
Output voltage ripple, 9V/2A ΔVOUT 85 90 95 mV VIN=12V, VOUT=9V@2A 5
Output voltage ripple, 12V/1.5A ΔVOUT 90 95 100 mV VIN=24V, VOUT=[email protected] 5
Output voltage VOUT 3 5 12 V 5
Quiescent input current IQ 3 mA VIN=12V, VOUT=5V@0A 5
High-side (upper) MOSFET on-resistance RDS(ON) 30 mΩ 5
Low-side (lower) MOSFET on-resistance RDS(ON) 20 mΩ 5
Switching frequency FS 100 KHz 5
Soft-start time TSS 4 ms VIN=12V, VOUT=5V 5
Output line compensation voltage VCOMP 100 mV VIN=12V, VOUT=5V, IOUT=2A 5
Output maximum current in CC mode IOUT 3.1 A VIN=12V, VOUT<=4V 5
Output maximum current in CC mode IOUT 2 A VIN=12V, 7V<VOUT<=9V 5
Output maximum current in CC mode IOUT 1.5 A VIN=24V, 9V<VOUT<=12V 5
Hiccup restart voltage after CC mode (VOUT setpoint >= 5V) VOUT 4.1 V After entering CC mode; VOUT setpoint >= 5V 5
Hiccup restart voltage after CC mode (VOUT setpoint < 5V) VOUT 3 V After entering CC mode; VOUT setpoint < 5V 5
Hiccup interval THIC 2 s VIN=12V, output short-circuit 5
DP/DM overvoltage protection threshold VOVP_DPDM 4.5 V VIN=12V, VOUT=5V 5
CC overvoltage protection threshold VOVP_CC 6 V VIN=12V, VOUT=5V 6
Thermal shutdown temperature TOTP 150 ℃ Rising temperature 6
Thermal shutdown hysteresis ΔTOTP 40 ℃ 6
Thermal resistance, junction to ambient θJA 40 ℃/W Junction to ambient 4
ESD, human body model (HBM) ESD 4 KV Human body model (HBM) 4

CAD (KiCad official)

  • Symbol: IP6520_20W
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: ip6520-20w-etched.step / ip6520-20w-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ip6520-20w.step / ip6520-20w.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: INJOINIC datasheet (16 pp, sha256 85610d5c87ce8669, retrieved 2026-10-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF