component
INA848IDR
Public Made by Adomby adom
Texas Instruments Instrumentation OpAmps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownINA848IDR
Texas Instruments · Instrumentation OpAmps · SOIC-8
INA848IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | -IN | input | Negative (inverting) input of the instrumentation amplifier. |
| 2 | -FL | input | Negative filter terminal for access to the internal node between gain stages; its input voltage is limited to (-VS) - 0.5 V to (+VS) + 0.5 V. |
| 3 | +FL | input | Positive filter terminal for access to the internal node between gain stages; its input voltage is limited to (-VS) - 0.5 V to (+VS) + 0.5 V. |
| 4 | +IN | input | Positive (noninverting) input of the instrumentation amplifier. |
| 5 | -VS | power_in | Negative supply; the device runs from 8 V to 36 V single supply or ±4 V to ±18 V dual supply. |
| 6 | REF | input | Reference input that must be driven by a low impedance source; its voltage is limited to (-VS) - 0.5 V to (+VS) + 0.5 V. |
| 7 | OUT | output | Amplifier output with a maximum output current of ±50 mA. |
| 8 | +VS | power_in | Positive supply; the device runs from 8 V to 36 V single supply or ±4 V to ±18 V dual supply. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, single supply | VS | 40 | V | Single supply, VS = (+VS) | 4 | ||
| Supply voltage, dual supply | VS | 20 | V | Dual supply, VS = (+VS), (-VS) | 4 | ||
| Differential input voltage | VIN | -0.5 | 0.5 | V | Differential | 4 | |
| Signal output pins maximum current | IO | -50 | 50 | mA | Signal output pins maximum current | 4 | |
| Output short-circuit current | IS | -50 | 50 | mA | Output short-circuit | 4 | |
| Operating temperature | TA | 125 | °C | Operating temperature | 4 | ||
| Junction temperature | TJ | 175 | °C | Junction temperature | 4 | ||
| Storage temperature | Tstg | 150 | °C | Storage temperature | 4 | ||
| Electrostatic discharge, HBM | V(ESD) | -2000 | 2000 | V | Human-body model (HBM) | 4 | |
| Electrostatic discharge, CDM | V(ESD) | -750 | 750 | V | Charged-device model (CDM) | 4 | |
| Supply voltage, single supply | VS | 8 | 36 | V | Single supply, VS = (+VS) | 4 | |
| Supply voltage, dual supply | VS | 4 | 18 | V | Dual supply, VS = (+VS), (-VS) | 4 | |
| Specified temperature | TA | -40 | 125 | °C | 4 | ||
| Input offset voltage | VOSI | -35 | 10 | 35 | µV | 5 | |
| Input offset voltage over temperature | VOSI | -80 | 80 | µV | TA = -40°C to +125°C | 5 | |
| Input offset voltage drift | -0.45 | 0.1 | 0.45 | µV/°C | TA = -40°C to +125°C | 5 | |
| Power-supply rejection ratio | PSRR | 125 | 150 | dB | ±4 V ≤ (VS) ≤ ±18 V | 5 | |
| Common-mode rejection ratio, dc to 60 Hz | CMRR | 132 | 150 | dB | At dc to 60 Hz, RTI, (-VS) + 2.5 V < VCM < (+VS), 2.5 V | 5 | |
| Input bias current | IB | 25 | 50 | nA | VCM = VS / 2 | 5 | |
| Input offset current | IOS | 2 | 10 | nA | VCM = VS / 2 | 5 | |
| Input voltage noise | eNI | 1.3 | 1.5 | nV/√Hz | f = 1 kHz, RS = 0 Ω | 5 | |
| Total gain error | GE | 0.05 | 0.15 | % | VO = ±10 V | 5 | |
| Total gain drift | 5 | ppm/°C | TA = -40°C to +125°C | 5 | |||
| Load capacitance | CL | 1000 | pF | In stable condition | 5 | ||
| Short-circuit current | ISC | -30 | 30 | mA | Continuous to VS / 2 | 5 | |
| Slew rate | SR | 35 | 45 | V/µs | VSTEP = 10 V | 5 | |
| Quiescent current | IQ | 6.2 | 6.6 | mA | VIN = 0 V | 6 | |
| Quiescent current, over temperature -40°C to +85°C | IQ | 7.9 | mA | TA = -40°C to +85°C | 6 | ||
| Quiescent current, over temperature -40°C to +125°C | IQ | 8.8 | mA | TA = -40°C to +125°C | 6 | ||
| Junction-to-ambient thermal resistance | RθJA | 119.6 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 66.3 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 61.9 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 20.5 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 61.4 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
INA848IDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ina848idr-etched.step/ina848idr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ina848idr.step/ina848idr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
cbd7e864d41c6ea8, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).