component
INA826AIDGKR
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Texas Instruments Instrumentation OpAmps, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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INA826AIDGKR
Texas Instruments · Instrumentation OpAmps · VSSOP-8
INA826AIDGKR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | -IN | input | Negative (inverting) input of the instrumentation amplifier; inputs are protected up to ±40 V beyond the supplies. |
| 2 | RG | passive | Gain setting pin; place a gain resistor between pin 2 and pin 3. |
| 3 | RG | passive | Gain setting pin; place a gain resistor between pin 2 and pin 3. |
| 4 | +IN | input | Positive (noninverting) input of the instrumentation amplifier; inputs are protected up to ±40 V beyond the supplies. |
| 5 | -VS | power_in | Negative supply; single supply 3 V to 36 V or dual supply ±1.5 V to ±18 V overall. |
| 6 | REF | input | Reference input; this pin must be driven by low impedance. |
| 7 | VOUT | output | Rail-to-rail output of the instrumentation amplifier. |
| 8 | +VS | power_in | Positive supply; single supply 3 V to 36 V or dual supply ±1.5 V to ±18 V overall. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Amplifiers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input stage offset voltage | VOSI | 40 | 150 | µV | RTI | 6 | |
| Input stage offset voltage drift | VOSI | 0.4 | 2 | µV/°C | TA = -40°C to +125°C | 6 | |
| Output stage offset voltage | VOSO | 200 | 700 | µV | RTI | 6 | |
| Output stage offset voltage drift | VOSO | 2 | 10 | µV/°C | TA = -40°C to +125°C | 6 | |
| Power-supply rejection ratio | PSRR | 100 | 124 | dB | G = 1, RTI | 6 | |
| Power-supply rejection ratio | PSRR | 115 | 130 | dB | G = 10, RTI | 6 | |
| Power-supply rejection ratio | PSRR | 120 | 140 | dB | G = 100, RTI | 6 | |
| Input overvoltage range | -40 | 40 | V | TA = -40°C to 125°C | 6 | ||
| Common-mode rejection ratio | CMRR | 84 | 95 | dB | At dc to 60 Hz, RTI, G = 1, VCM = (V-) to (V+), 1 V | 6 | |
| Common-mode rejection ratio | CMRR | 104 | 115 | dB | At dc to 60 Hz, RTI, G = 10, VCM = (V-) to (V+), 1 V | 6 | |
| Common-mode rejection ratio | CMRR | 120 | 130 | dB | At dc to 60 Hz, RTI, G = 100, VCM = (V-) to (V+), 1 V | 6 | |
| Common-mode rejection ratio | CMRR | 80 | dB | G = 1, VCM = (V-) to (V+), 1 V, TA = -40°C to +125°C | 6 | ||
| Common-mode rejection ratio | CMRR | 84 | dB | At 5 kHz, RTI, G = 1, VCM = (V-) to (V+), 1 V | 6 | ||
| Common-mode rejection ratio | CMRR | 100 | dB | At 5 kHz, RTI, G = 10, VCM = (V-) to (V+), 1 V | 6 | ||
| Common-mode rejection ratio | CMRR | 105 | dB | At 5 kHz, RTI, G = 100, VCM = (V-) to (V+), 1 V | 6 | ||
| Input bias current | IB | 35 | 65 | nA | VCM = VS / 2 | 6 | |
| Input bias current | IB | 95 | nA | TA = -40°C to +125°C | 6 | ||
| Input offset current | IOS | 0.7 | 5 | nA | VCM = VS / 2 | 6 | |
| Input offset current | IOS | 10 | nA | TA = -40°C to +125°C | 6 | ||
| Input stage voltage noise | eNI | 18 | 20 | nV/√Hz | f = 1 kHz, G = 100, RS = 0 Ω | 6 | |
| Output stage voltage noise | eNO | 110 | 115 | nV/√Hz | f = 1 kHz, G = 1, RS = 0 Ω | 6 | |
| Gain error | GE | 0.003 | 0.015 | % | G = 1, VO = ±10 V | 7 | |
| Gain error | GE | 0.03 | 0.15 | % | G = 10, VO = ±10 V | 7 | |
| Gain error | GE | 0.04 | 0.15 | % | G = 100, VO = ±10 V | 7 | |
| Gain vs temperature | 0.1 | 1 | ppm/°C | G = 1, TA = -40°C to +125°C | 7 | ||
| Gain vs temperature | 10 | 35 | ppm/°C | G > 1, TA = -40°C to +125°C | 7 | ||
| Gain nonlinearity | 1 | 5 | ppm | G = 1 to 100, VO = -10 V to +10 V | 7 | ||
| Gain nonlinearity | 5 | 20 | ppm | G = 1000, VO = -10 V to +10 V | 7 | ||
| Short-circuit current | ISC | 16 | mA | Continuous to VS / 2 | 7 | ||
| Quiescent current | IQ | 200 | 250 | µA | VIN = 0 V | 7 | |
| Quiescent current vs temperature | IQ | 250 | 300 | µA | TA = -40°C to +125°C | 7 | |
| Power-supply voltage, single supply | VS | 3 | 36 | V | Single supply | 7 | |
| Power-supply voltage, dual supply | VS | -1.5 | 1.5 | V | Dual supply, printed ±1.5 to ±18 | 7 | |
| Supply voltage (abs max) | -20 | 20 | V | 5 | |||
| REF pin voltage (abs max) | -20 | 20 | V | 5 | |||
| Operating temperature, TA (abs max) | TA | -50 | 150 | °C | 5 | ||
| Junction temperature | TJ | 175 | °C | 5 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Supply voltage, single supply | 3 | 36 | V | Single supply | 5 | ||
| Specified temperature | -40 | 125 | °C | 5 | |||
| Operating temperature | -50 | 150 | °C | 5 | |||
| Junction-to-ambient thermal resistance (DGK VSSOP) | RθJA | 215.4 | °C/W | DGK (VSSOP), 8 pins | 5 | ||
| Junction-to-case (top) thermal resistance (DGK VSSOP) | RθJC(top) | 66.3 | °C/W | DGK (VSSOP), 8 pins | 5 | ||
| Junction-to-board thermal resistance (DGK VSSOP) | RθJB | 97.8 | °C/W | DGK (VSSOP), 8 pins | 5 | ||
| Junction-to-top characterization parameter (DGK VSSOP) | ψJT | 10.5 | °C/W | DGK (VSSOP), 8 pins | 5 | ||
| Junction-to-board characterization parameter (DGK VSSOP) | ψJB | 96.1 | °C/W | DGK (VSSOP), 8 pins | 5 |
CAD (KiCad official)
- Symbol:
INA826AIDGKR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
ina826aidgkr-etched.step/ina826aidgkr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ina826aidgkr.step/ina826aidgkr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (48 pp, sha256
5f68e2622e9dc460, retrieved 2026-10-23, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# INA826AIDGKR
**Texas Instruments** · Instrumentation OpAmps · VSSOP-8
INA826AIDGKR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | -IN | input | Negative (inverting) input of the instrumentation amplifier; inputs are protected up to ±40 V beyond the supplies. |
| 2 | RG | passive | Gain setting pin; place a gain resistor between pin 2 and pin 3. |
| 3 | RG | passive | Gain setting pin; place a gain resistor between pin 2 and pin 3. |
| 4 | +IN | input | Positive (noninverting) input of the instrumentation amplifier; inputs are protected up to ±40 V beyond the supplies. |
| 5 | -VS | power_in | Negative supply; single supply 3 V to 36 V or dual supply ±1.5 V to ±18 V overall. |
| 6 | REF | input | Reference input; this pin must be driven by low impedance. |
| 7 | VOUT | output | Rail-to-rail output of the instrumentation amplifier. |
| 8 | +VS | power_in | Positive supply; single supply 3 V to 36 V or dual supply ±1.5 V to ±18 V overall. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8 |
| Category | Amplifiers |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input stage offset voltage | VOSI | | 40 | 150 | µV | RTI | 6 |
| Input stage offset voltage drift | VOSI | | 0.4 | 2 | µV/°C | TA = -40°C to +125°C | 6 |
| Output stage offset voltage | VOSO | | 200 | 700 | µV | RTI | 6 |
| Output stage offset voltage drift | VOSO | | 2 | 10 | µV/°C | TA = -40°C to +125°C | 6 |
| Power-supply rejection ratio | PSRR | 100 | 124 | | dB | G = 1, RTI | 6 |
| Power-supply rejection ratio | PSRR | 115 | 130 | | dB | G = 10, RTI | 6 |
| Power-supply rejection ratio | PSRR | 120 | 140 | | dB | G = 100, RTI | 6 |
| Input overvoltage range | | -40 | | 40 | V | TA = -40°C to 125°C | 6 |
| Common-mode rejection ratio | CMRR | 84 | 95 | | dB | At dc to 60 Hz, RTI, G = 1, VCM = (V-) to (V+), 1 V | 6 |
| Common-mode rejection ratio | CMRR | 104 | 115 | | dB | At dc to 60 Hz, RTI, G = 10, VCM = (V-) to (V+), 1 V | 6 |
| Common-mode rejection ratio | CMRR | 120 | 130 | | dB | At dc to 60 Hz, RTI, G = 100, VCM = (V-) to (V+), 1 V | 6 |
| Common-mode rejection ratio | CMRR | 80 | | | dB | G = 1, VCM = (V-) to (V+), 1 V, TA = -40°C to +125°C | 6 |
| Common-mode rejection ratio | CMRR | 84 | | | dB | At 5 kHz, RTI, G = 1, VCM = (V-) to (V+), 1 V | 6 |
| Common-mode rejection ratio | CMRR | 100 | | | dB | At 5 kHz, RTI, G = 10, VCM = (V-) to (V+), 1 V | 6 |
| Common-mode rejection ratio | CMRR | 105 | | | dB | At 5 kHz, RTI, G = 100, VCM = (V-) to (V+), 1 V | 6 |
| Input bias current | IB | | 35 | 65 | nA | VCM = VS / 2 | 6 |
| Input bias current | IB | | | 95 | nA | TA = -40°C to +125°C | 6 |
| Input offset current | IOS | | 0.7 | 5 | nA | VCM = VS / 2 | 6 |
| Input offset current | IOS | | | 10 | nA | TA = -40°C to +125°C | 6 |
| Input stage voltage noise | eNI | | 18 | 20 | nV/√Hz | f = 1 kHz, G = 100, RS = 0 Ω | 6 |
| Output stage voltage noise | eNO | | 110 | 115 | nV/√Hz | f = 1 kHz, G = 1, RS = 0 Ω | 6 |
| Gain error | GE | | 0.003 | 0.015 | % | G = 1, VO = ±10 V | 7 |
| Gain error | GE | | 0.03 | 0.15 | % | G = 10, VO = ±10 V | 7 |
| Gain error | GE | | 0.04 | 0.15 | % | G = 100, VO = ±10 V | 7 |
| Gain vs temperature | | | 0.1 | 1 | ppm/°C | G = 1, TA = -40°C to +125°C | 7 |
| Gain vs temperature | | | 10 | 35 | ppm/°C | G > 1, TA = -40°C to +125°C | 7 |
| Gain nonlinearity | | | 1 | 5 | ppm | G = 1 to 100, VO = -10 V to +10 V | 7 |
| Gain nonlinearity | | | 5 | 20 | ppm | G = 1000, VO = -10 V to +10 V | 7 |
| Short-circuit current | ISC | | 16 | | mA | Continuous to VS / 2 | 7 |
| Quiescent current | IQ | | 200 | 250 | µA | VIN = 0 V | 7 |
| Quiescent current vs temperature | IQ | | 250 | 300 | µA | TA = -40°C to +125°C | 7 |
| Power-supply voltage, single supply | VS | 3 | | 36 | V | Single supply | 7 |
| Power-supply voltage, dual supply | VS | -1.5 | | 1.5 | V | Dual supply, printed ±1.5 to ±18 | 7 |
| Supply voltage (abs max) | | -20 | | 20 | V | | 5 |
| REF pin voltage (abs max) | | -20 | | 20 | V | | 5 |
| Operating temperature, TA (abs max) | TA | -50 | | 150 | °C | | 5 |
| Junction temperature | TJ | | | 175 | °C | | 5 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 5 |
| Supply voltage, single supply | | 3 | | 36 | V | Single supply | 5 |
| Specified temperature | | -40 | | 125 | °C | | 5 |
| Operating temperature | | -50 | | 150 | °C | | 5 |
| Junction-to-ambient thermal resistance (DGK VSSOP) | RθJA | | 215.4 | | °C/W | DGK (VSSOP), 8 pins | 5 |
| Junction-to-case (top) thermal resistance (DGK VSSOP) | RθJC(top) | | 66.3 | | °C/W | DGK (VSSOP), 8 pins | 5 |
| Junction-to-board thermal resistance (DGK VSSOP) | RθJB | | 97.8 | | °C/W | DGK (VSSOP), 8 pins | 5 |
| Junction-to-top characterization parameter (DGK VSSOP) | ψJT | | 10.5 | | °C/W | DGK (VSSOP), 8 pins | 5 |
| Junction-to-board characterization parameter (DGK VSSOP) | ψJB | | 96.1 | | °C/W | DGK (VSSOP), 8 pins | 5 |
## CAD (KiCad official)
- Symbol: `INA826AIDGKR`
- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`
- 3D model: VSSOP-8 (KiCad packages3D, STEP)
- 3D model files: `ina826aidgkr-etched.step` / `ina826aidgkr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ina826aidgkr.step` / `ina826aidgkr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ina826ai.pdf) (48 pp, sha256 `5f68e2622e9dc460`, retrieved 2026-10-23, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ina826aidgkr-datasheet.pdf)