INA229AIDGST

Texas Instruments · Current Sense Amplifiers · VSSOP-10-0.5mm

INA229AIDGST from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CS	input	SPI chip select input, active low; the SPI transaction runs from the CS falling edge to the CS rising edge, and the MISO output is high-impedance while CS is high.
2	MOSI	input	SPI digital data input (SPI slave input / master output), sampled on the falling edge of SCLK.
3	ALERT	output	Open-drain alert output, active low by default (polarity configurable via APOL); it must be pulled up through a resistor.
4	MISO	tri_state	SPI digital data output (slave output / master input), push-pull, shifted out on the rising edge of SCLK and high-impedance when CS is high.
5	SCLK	input	SPI clock input, rated up to 10 MHz SPI bit frequency.
6	VS	power_in	Device power supply, 2.7 V to 5.5 V (recommended operating range).
7	GND	power_in	Ground reference; the datasheet notes the device should not be operated powered with the GND pin disconnected.
8	VBUS	power_in	Bus voltage analog input, measured referenced to GND over 0 V to 85 V (absolute maximum -0.3 V to 85 V).
9	IN-	input	Negative device input for the shunt sense resistor; connect to the load side of the sense resistor in high-side applications and to the ground side in low-side applications (common-mode range -0.3 V to 85 V).
10	IN+	input	Positive device input for the shunt sense resistor; connect to the supply side in high-side applications and to the load side in low-side applications (common-mode range -0.3 V to 85 V).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VSSOP-10-0.5mm
Category	Amplifiers/Comparators
Pins	10

CAD (KiCad official)

Symbol: INA229AIDGST
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
3D model files: ina229aidgst-etched.step / ina229aidgst-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina229aidgst.step / ina229aidgst.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (46 pp, sha256 8e13390cb348f414, retrieved 2026-10-08, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# INA229AIDGST

**Texas Instruments** · Current Sense Amplifiers · VSSOP-10-0.5mm

INA229AIDGST from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CS | input | SPI chip select input, active low; the SPI transaction runs from the CS falling edge to the CS rising edge, and the MISO output is high-impedance while CS is high. |
| 2 | MOSI | input | SPI digital data input (SPI slave input / master output), sampled on the falling edge of SCLK. |
| 3 | ALERT | output | Open-drain alert output, active low by default (polarity configurable via APOL); it must be pulled up through a resistor. |
| 4 | MISO | tri_state | SPI digital data output (slave output / master input), push-pull, shifted out on the rising edge of SCLK and high-impedance when CS is high. |
| 5 | SCLK | input | SPI clock input, rated up to 10 MHz SPI bit frequency. |
| 6 | VS | power_in | Device power supply, 2.7 V to 5.5 V (recommended operating range). |
| 7 | GND | power_in | Ground reference; the datasheet notes the device should not be operated powered with the GND pin disconnected. |
| 8 | VBUS | power_in | Bus voltage analog input, measured referenced to GND over 0 V to 85 V (absolute maximum -0.3 V to 85 V). |
| 9 | IN- | input | Negative device input for the shunt sense resistor; connect to the load side of the sense resistor in high-side applications and to the ground side in low-side applications (common-mode range -0.3 V to 85 V). |
| 10 | IN+ | input | Positive device input for the shunt sense resistor; connect to the supply side in high-side applications and to the load side in low-side applications (common-mode range -0.3 V to 85 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-10-0.5mm |
| Category | Amplifiers/Comparators |
| Pins | 10 |

## CAD (KiCad official)

- Symbol: `INA229AIDGST`
- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`
- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
- 3D model files: `ina229aidgst-etched.step` / `ina229aidgst-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ina229aidgst.step` / `ina229aidgst.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ina229) (46 pp, sha256 `8e13390cb348f414`, retrieved 2026-10-08, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ina229aidgst-datasheet.pdf)