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INA148QDRQ1

Texas Instruments · Differential OpAmps · SOIC-8

INA148QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference voltage input that sets the output reference level of the difference amplifier.
2 -IN input Inverting input of the difference amplifier, rated for common-mode input voltage up to ±200 V with VS = ±15 V (Continuous input voltage ±200 V, peak 0.1 s ±500 V).
3 +IN input Noninverting input of the difference amplifier, rated for common-mode input voltage up to ±200 V with VS = ±15 V (Continuous input voltage ±200 V, peak 0.1 s ±500 V).
4 V- power_in Negative supply voltage; the device operates from single supplies of 2.7 V to 36 V or dual supplies of ±1.35 V to ±18 V.
5 NC unconnected No connection.
6 OUT output Output voltage of the difference amplifier.
7 V+ power_in Positive supply voltage; the device operates from single supplies of 2.7 V to 36 V or dual supplies of ±1.35 V to ±18 V (supply V+ to V- absolute maximum 36 V).
8 NC unconnected No connection.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage V+ to V- 36 V 3
Input voltage -200 200 V Continuous 3
Input voltage -500 500 V Peak (0.1 s) 3
Package thermal impedance, junction to free air 97.1 °C/W 3
Operating free-air temperature TA -40 125 °C 3
Maximum operating virtual-junction temperature 150 °C 3
Lead temperature (soldering) 300 °C 10 s 3
Storage temperature Tstg -65 150 °C 3
Electrostatic discharge, human-body model (HBM) V(ESD) -1500 1500 V Per AEC Q100-002 3
Electrostatic discharge, charged-device model (CDM) V(ESD) -2000 2000 V Per AEC Q100-011 3
Electrostatic discharge, machine model V(ESD) -150 150 V 3
Supply voltage, single supply VS 2.7 36 V Single supply 4
Supply voltage, dual supply VS 1.35 18 V Dual supply, printed as ±1.35 V to ±18 V 4
Operating free-air temperature TA -40 125 °C 4
Input offset voltage VOS -5 1 5 mV VCM = 0 V, VS = ±15 V 4
Input offset voltage drift ΔVOS/ΔT -10 10 μV/°C TA = -40°C to 125°C 4
Power supply ripple rejection PSRR -400 50 400 μV/V VS = ±1.35 V to ±18 V, VCM = 0 V 4
Common-mode voltage range VCM -200 200 V V+IN, V-IN = 0, VS = ±15 V 4
Common-mode voltage range VCM -100 80 V V+IN, V-IN = 0, VS = ±5 V 4
Common-mode rejection ratio CMRR 70 86 dB VS = ±15 V, VCM = -200 V to 200 V, RS = 0 Ω 4
Gain error -0.075 0.01 0.075 % VO = (V- + 0.5) to (V+, 1.5) 4
Gain error over temperature -10 3 10 ppm/°C 4
Gain nonlinearity -0.002 0.001 0.002 %FSR VO = (V- + 0.5) to (V+, 1.5), VS = ±15 V 4
Output current, short-circuit IO -13 13 mA Short-circuit current, continuous to common 5
Load capacitance CL 10 nF Stable operation 5
Supply current IS -300 260 300 μA VIN = 0, IO = 0, VS = ±15 V dual supply 5
Input offset voltage VOS -5 1 5 mV VCM = VS / 2, single supply 5 V 5
Input offset voltage drift ΔVOS/ΔT -10 10 μV/°C TA = -40°C to 125°C 5
Power supply ripple rejection PSRR -400 50 400 μV/V VS = 2.7 V to 36 V, VCM = VS / 2 5
Common-mode voltage range VCM -4 75 V V+IN, V-IN = 0, VREF = 0.25 V 5
Common-mode voltage range VCM -47.5 32.5 V V+IN, V-IN = 0, VREF = VS / 2 5
Common-mode rejection ratio CMRR 70 86 dB VCM = -47.5 V to 32.5 V, RS = 0 Ω 5
Gain error -0.075 0.01 0.075 % VO = 0.5 V to 3.5 V 5
Gain error over temperature -10 3 10 ppm/°C 5
Output current, short-circuit IO -8 8 mA Short-circuit current, continuous to common 5
Quiescent current IQ 260 300 μA VIN = 0, IO = 0 5
Junction-to-ambient thermal resistance RθJA 100.6 °C/W 4
Junction-to-case (top) thermal resistance RθJC(top) 44.9 °C/W 4
Junction-to-board thermal resistance RθJB 42.2 °C/W 4
Junction-to-top characterization parameter ψJT 6.3 °C/W 4
Junction-to-board characterization parameter ψJB 41.5 °C/W 4

CAD (KiCad official)

  • Symbol: INA148QDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ina148qdrq1-etched.step / ina148qdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina148qdrq1.step / ina148qdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 f383bb57b087fdc6, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF