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Contents

README

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INA101ASOIC8

analogysemi · Instrumentation OpAmps · SOIC-8

INA101ASOIC8 from analogysemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RG passive Gain-setting pin; connect a resistor between pin 1 and pin 8 to set gain G = 1 + 49.4kΩ/RG (leave open for G = 1).
2 -IN input Inverting signal input; input voltage range is -VS + 0.1V to +VS - 2V, and a series resistor should limit current to 10mA for overvoltage.
3 +IN input Non-inverting signal input; input voltage range is -VS + 0.1V to +VS - 2V, and a series resistor should limit current to 10mA for overvoltage.
4 -VS power_in Negative power supply; split-supply operating range is ±2V to ±19V.
5 REF input Output reference voltage input that sets zero output level; connect to ground or a low-resistance source, with 40kΩ input resistance and range -VS to +VS.
6 OUTPUT output Amplifier output with short-circuit current of ±17mA and swing of within 0.2V of the supply rails (RL = 10kΩ).
7 +VS power_in Positive power supply; split-supply operating range is ±2V to ±19V, absolute maximum ±20V.
8 RG passive Gain-setting pin; connect a resistor between pin 8 and pin 1 to set gain G = 1 + 49.4kΩ/RG (leave open for G = 1).

Key specifications

Parameter Value
Manufacturer analogysemi
Package SOIC-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gain Error 0.02 0.04 % VOUT = ±10V, G = 1 6
Gain Error 0.03 0.08 % VOUT = ±10V, G = 10 6
Gain Error 0.03 0.15 % VOUT = ±10V, G = 1000 6
Gain vs. Temperature 0.5 2 ppm/°C G = 1 6
Gain vs. Temperature 4 24 ppm/°C Gain > 1 6
Input Offset Voltage VOSI -12 2.5 12 μV VS = ±18V 6
Input Offset Voltage over temperature VOSI -17 17 μV VS = ±2V to ±19V, overtemperature 6
Output Offset Voltage VOSO -240 40 240 μV VS = ±18V 6
Output Offset Voltage over temperature VOSO -420 420 μV VS = ±2V to ±19V, overtemperature 6
Input Bias Current IB 1 3 nA 6
Input Bias Current overtemperature IB 3.5 nA Overtemperature 6
Input Offset Current IOS 0.6 2.2 nA 6
Input Offset Current overtemperature IOS 2.4 nA Overtemperature 6
PSR PSR 108 133 dB VS = ±2V to ±20V, G = 1 6
PSR PSR 126 140 dB VS = ±2V to ±20V, G = 10 6
PSR PSR 130 144 dB VS = ±2V to ±20V, G = 100 6
PSR PSR 130 146 dB VS = ±2V to ±20V, G = 1000 6
Input Voltage Range 0.1 -2 V VS = ±2V to ±19V; −VS + 0.1 to +VS − 2 7
Common-Mode Rejection Ratio CMRR 97 104 dB VCM = (-VS + 0.1V) to (+VS, 2V), G = 1 7
Common-Mode Rejection Ratio CMRR 110 124 dB VCM = (-VS + 0.1V) to (+VS, 2V), G = 10 7
Common-Mode Rejection Ratio CMRR 129 141 dB VCM = (-VS + 0.1V) to (+VS, 2V), G = 100 7
Common-Mode Rejection Ratio CMRR 136 157 dB VCM = (-VS + 0.1V) to (+VS, 2V), G = 1000 7
Short Circuit Current 17 mA Overtemperature, ± 7
Reference Gain to Output 1.2 23 μV/V 7
Operating Range VS -2 19 V ±2 to ±19 7
Quiescent Current IQ 1.56 1.9 mA VS = ±2V to ±19V 7
Quiescent Current overtemperature IQ 2 mA Overtemperature 7
Supply Voltage 20 V ±20 4
Input voltage -0.3 0.3 V -VS, 0.3 to +VS + 0.3 4
Current any pin except power supply -10 10 mA 4
Operating temperature INA101 TA -40 85 °C 4
Storage temperature Tstg -65 150 °C 4
Soldering temperature 300 °C 10s 4
Operating Voltage Range split supply 2 18 19 V Split supply, ± 5
Operating Voltage Range single supply 4 36 38 V Single supply 5
Specified Temperature Range INA101 -40 85 °C 5
Junction-to-Ambient Thermal Resistance RθJA 90.6 °C/W SOIC-8 5
Junction-to-Board Thermal Resistance RθJB 47.6 °C/W SOIC-8 5
Junction-to-Case (Top) Thermal Resistance RθJC(top) 35 °C/W SOIC-8 5
Junction-to-Case (Bottom) Thermal Resistance RθJC(bot) 50.8 °C/W SOIC-8 5
Small Signal -3dB Bandwidth BW 1300 kHz G = 1 7
Slew Rate SR 1.6 V/μs G = 1, 10V step 7
Settling Time to 0.01% 75 μs G = 1, 10V step 7

CAD (KiCad official)

  • Symbol: INA101ASOIC8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ina101asoic8-etched.step / ina101asoic8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ina101asoic8.step / ina101asoic8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: analogysemi datasheet (25 pp, sha256 c668acc583d72f0c, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF