component
IL715-3E
Public Made by Adomby adom
NVE Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 12d ago |
| viewers | 12d ago |
| il715-3e-etched.glb | 12d ago |
| il715-3e-etched.step | 12d ago |
| il715-3e-hero.glb | 12d ago |
| il715-3e-hero.overlay.json | 12d ago |
| il715-3e.glb | 12d ago |
| il715-3e.kicad_mod | 12d ago |
| il715-3e.kicad_sym | 12d ago |
| il715-3e.lbr | 12d ago |
| il715-3e.step | 12d ago |
| package.json | 12d ago |
| page.json | 12d ago |
| README.md | 12d ago |
IL715-3E
NVE · Digital Isolators · SOIC-16
IL715-3E from NVE, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Supply voltage for the input side, specified at 3.0 V to 5.5 V in the recommended operating conditions. |
| 2 | GND1 | power_in | Ground return for VDD1; internally connected to pins 8 (NVE note: pins 2 and 8 are internally connected). |
| 3 | IN1 | input | Data input for channel 1; logic high input requires at least 2.4 V and logic low input must not exceed 0.8 V. |
| 4 | IN2 | input | Data input for channel 2; logic high input requires at least 2.4 V and logic low input must not exceed 0.8 V. |
| 5 | IN3 | input | Data input for channel 3; logic high input requires at least 2.4 V and logic low input must not exceed 0.8 V. |
| 6 | IN4 | input | Data input for channel 4; logic high input requires at least 2.4 V and logic low input must not exceed 0.8 V. |
| 7 | NC | unconnected | No connection. |
| 8 | GND1 | power_in | Ground return for VDD1; internally connected to pin 2. |
| 9 | GND2 | power_in | Ground return for VDD2; internally connected to pin 15. |
| 10 | NC | unconnected | No connection. |
| 11 | OUT4 | output | Data output for channel 4; output current drive is limited to 10 mA absolute maximum. |
| 12 | OUT3 | output | Data output for channel 3; output current drive is limited to 10 mA absolute maximum. |
| 13 | OUT2 | output | Data output for channel 2; output current drive is limited to 10 mA absolute maximum. |
| 14 | OUT1 | output | Data output for channel 1; output current drive is limited to 10 mA absolute maximum. |
| 15 | GND2 | power_in | Ground return for VDD2; internally connected to pin 9. |
| 16 | VDD2 | power_in | Supply voltage for the output side, specified at 3.0 V to 5.5 V in the recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NVE |
| Package | SOIC-16 |
| Category | Interface ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage Temperature | TS | -55 | 150 | °C | 2 | ||
| Junction Temperature | TJ | -55 | 150 | °C | 2 | ||
| Ambient Operating Temperature (standard grade) | TA | -40 | 100 | °C | 2 | ||
| Supply Voltage | VDD1, VDD2 | -0.5 | 7 | V | 2 | ||
| Input Voltage | VI | -0.5 | V | 2 | |||
| Output Voltage | VO | -0.5 | V | 2 | |||
| Output Current Drive | IO | 10 | mA | 2 | |||
| Lead Solder Temperature | 260 | °C | 10 sec. | 2 | |||
| ESD | 2 | kV | HBM | 2 | |||
| Ambient Operating Temperature | TA | -40 | 100 | °C | 2 | ||
| Junction Temperature (standard grade) | TJ | -40 | 110 | °C | 2 | ||
| Supply Voltage | VDD1, VDD2 | 3 | 5.5 | V | 2 | ||
| Logic High Input Voltage | VIH | 2.4 | V | 2 | |||
| Logic Low Input Voltage | VIL | 0 | 0.8 | V | 2 | ||
| Input Signal Rise and Fall Times | tIR, tIF | 1 | µs | 2 | |||
| Input Quiescent Supply Current (IL715 and IL715-3), 3.3 V table | IDD1 | 16 | 20 | µA | 6 | ||
| Output Quiescent Supply Current (IL715), 3.3 V table | IDD2 | 4.8 | 7 | mA | 6 | ||
| Logic Input Current, 3.3 V table | II | -10 | 10 | µA | 6 | ||
| Logic Low Output Voltage, 3.3 V table | VOL | 0 | 0.1 | V | IO = 20 µA, VI = VIL | 6 | |
| Logic Low Output Voltage, 3.3 V table | VOL | 0.5 | 0.8 | V | IO = 4 mA, VI = VIL | 6 | |
| Maximum Data Rate, 3.3 V | 100 | 110 | Mbps | CL = 15 pF | 6 | ||
| Pulse Width, 3.3 V | PW | 10 | ns | 50% Points, VO | 6 | ||
| Propagation Delay Input to Output (High to Low), 3.3 V | tPHL | 12 | 18 | ns | CL = 15 pF | 6 | |
| Propagation Delay Input to Output (Low to High), 3.3 V | tPLH | 12 | 18 | ns | CL = 15 pF | 6 | |
| Pulse Width Distortion, 3.3 V | PWD | 2 | 3 | ns | CL = 15 pF | 6 | |
| Propagation Delay Skew, 3.3 V | tPSK | 4 | 6 | ns | CL = 15 pF | 6 | |
| Output Rise Time (10%-90%), 3.3 V | tR | 2 | 4 | ns | CL = 15 pF | 6 | |
| Output Fall Time (10%-90%), 3.3 V | tF | 2 | 4 | ns | CL = 15 pF | 6 | |
| Common Mode Transient Immunity, 3.3 V | /CMH/,/CML/ | 30 | 50 | kV/µs | VCM = 1500 VDC, tTRANSIENT = 25 ns | 6 | |
| Channel-to-Channel Skew, 3.3 V | tCSK | 2 | 3 | ns | CL = 15 pF | 6 | |
| Dynamic Power Consumption, 3.3 V | 140 | 240 | µA/Mbps per channel | 6 | |||
| Power Frequency Magnetic Immunity, 3.3 V | HPF | 1000 | 1500 | A/m | 50Hz/60Hz | 6 | |
| Pulse Magnetic Field Immunity, 3.3 V | HPM | 1800 | 2000 | A/m | tp = 8µs | 6 | |
| Damped Oscillatory Magnetic Field, 3.3 V | HOSC | 1800 | 2000 | A/m | 0.1Hz, 1MHz | 6 | |
| Input Quiescent Supply Current (IL715 and IL715-3), 5 V table | IDD1 | 24 | 30 | µA | 7 | ||
| Output Quiescent Supply Current (IL715), 5 V table | IDD2 | 7.2 | 10 | mA | 7 | ||
| Logic Low Output Voltage, 5 V table | VOL | 0 | 0.1 | V | IO = 20 µA, VI = VIL | 7 | |
| Logic Low Output Voltage, 5 V table | VOL | 0.5 | 0.8 | V | IO = 4 mA, VI = VIL | 7 | |
| Maximum Data Rate, 5 V | 100 | 110 | Mbps | CL = 15 pF | 7 | ||
| Pulse Width, 5 V | PW | 10 | ns | 50% Points, VO | 7 | ||
| Propagation Delay Input to Output (High to Low), 5 V | tPHL | 10 | 15 | ns | CL = 15 pF | 7 | |
| Propagation Delay Input to Output (Low to High), 5 V | tPLH | 10 | 15 | ns | CL = 15 pF | 7 | |
| Pulse Width Distortion, 5 V | PWD | 2 | 3 | CL = 15 pF | 7 | ||
| Pulse Jitter, 5 V | tJ | 100 | ps | CL = 15 pF | 7 | ||
| Propagation Delay Skew, 5 V | tPSK | 4 | 6 | ns | CL = 15 pF | 7 | |
| Output Rise Time (10%-90%), 5 V | tR | 1 | 3 | ns | CL = 15 pF | 7 | |
| Output Fall Time (10%-90%), 5 V | tF | 1 | 3 | ns | CL = 15 pF | 7 | |
| Common Mode Transient Immunity, 5 V | /CMH/,/CML/ | 30 | 50 | kV/µs | VCM = 1500 VDC, tTRANSIENT = 25 ns | 7 | |
| Channel-to-Channel Skew, 5 V | tCSK | 2 | 3 | ns | CL = 15 pF | 7 | |
| Dynamic Power Consumption, 5 V | 200 | 340 | µA/Mbps per channel | 7 | |||
| Power Frequency Magnetic Immunity, 5 V | HPF | 2800 | 3500 | A/m | 50Hz/60Hz | 7 | |
| Pulse Magnetic Field Immunity, 5 V | HPM | 4000 | 4500 | A/m | tp = 8µs | 7 | |
| Damped Oscillatory Magnetic Field, 5 V | HOSC | 4000 | 4500 | A/m | 0.1Hz, 1MHz | 7 | |
| Power Dissipation (0.15" SOIC) | PD | 700 | mW | 2 | |||
| Junction-Ambient Thermal Resistance (0.15" SOIC) | θJA | 60 | °C/W | Soldered to double-sided board; free air | 2 | ||
| Junction-Case (Top) Thermal Resistance (0.15" SOIC) | ΨJT | 10 | °C/W | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Blank = 80/20 Tin/Lead Plating E = RoHS Compliant | 14 |
CAD (KiCad official)
- Symbol:
IL715-3E - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
il715-3e-etched.step/il715-3e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);il715-3e.step/il715-3e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NVE datasheet (18 pp, sha256
db1e441e91495957, retrieved 2026-10-28, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).