component

IL514-3ETR7

Public Made by Adom

by adom

NVE Digital Isolators, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsil514-3etr7factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
il514-3etr7 / README.md
History Download
Ray Publish 0.1.0 a0c5575 12d ago

IL514-3ETR7

NVE · Digital Isolators · SOIC-16

IL514-3ETR7 from NVE, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Supply voltage 1 for the input side; recommended operating range is 3.0 V to 5.5 V.
2 GND1 power_in Ground return for VDD1; pin 2 is internally connected to pin 8.
3 IN1 input Data input, channel 1; logic high input VIH is at least 2.4 V and logic low input VIL is at most 0.8 V.
4 IN2 input Data input, channel 2; logic high input VIH is at least 2.4 V and logic low input VIL is at most 0.8 V.
5 OUT3 output Data output, channel 3.
6 NC unconnected No connection.
7 VOE input Output enable for channel 3; internally held low with 100 kΩ, and a logic high places the output in high impedance per the truth table.
8 GND1 power_in Ground return for VDD1; pin 8 is internally connected to pin 2.
9 GND2 power_in Ground return for VDD2; pin 9 is internally connected to pin 15.
10 NC unconnected No connection.
11 NC unconnected No connection.
12 IN3 input Data input, channel 3; logic high input VIH is at least 2.4 V and logic low input VIL is at most 0.8 V.
13 OUT2 output Data output, channel 2.
14 OUT1 output Data output, channel 1.
15 GND2 power_in Ground return for VDD2; pin 15 is internally connected to pin 9.
16 VDD2 power_in Supply voltage 2 for the output side; recommended operating range is 3.0 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer NVE
Package SOIC-16
Category Interface ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TS -55 150 °C 2
Ambient Operating Temperature TA -40 85 °C 2
Supply Voltage VDD1, VDD2 -0.5 7 V 2
Input Voltage VI -0.5 V 2
Output Voltage VO -0.5 V 2
Output Current Drive IO 10 mA 2
Lead Solder Temperature 260 °C 10 sec. 2
ESD 2 kV HBM 2
Ambient Operating Temperature TA -40 85 °C 2
Supply Voltage VDD1, VDD2 3 5.5 V 2
Logic High Input Voltage VIH 2.4 V 2
Logic Low Input Voltage VIL 0 0.8 V 2
Thermal Resistance 0.15 in 16-pin SOIC junction-to-case θJC 41 °C/W 2
Package Power Dissipation PPD 150 mW f = 1 MHz, VDD = 5 V 2
Input Quiescent Supply Current IL514, IL521 (3.3 V) IDD1 1.3 1.8 mA 7
Output Quiescent Supply Current IL511, IL514, IL516 (3.3 V) IDD2 2.6 3.6 mA 7
Logic Input Current II -10 10 µA 7
Logic Low Output Voltage (3.3 V) VOL 0 0.1 V IO = 20 µA, VI = VIL 7
Logic Low Output Voltage (3.3 V) VOL 0.8 V IO = 4 mA, VI = VIL 7
Pulse Width SYNC=0 (3.3 V) PW 20 ns VO 50% points; SYNC=0 7
Pulse Width SYNC=1 (3.3 V) PW 25 ns VO 50% points; SYNC=1 7
Maximum Data Rate (3.3 V) 2 Mbps CL = 15 pF 7
Propagation Delay Input to Output (High to Low) (3.3 V) tPHL 25 ns CL = 15 pF 7
Propagation Delay Input to Output (Low to High) (3.3 V) tPLH 25 ns CL = 15 pF 7
Propagation Delay Enable to Output (High to High Impedance) (3.3 V) tPHZ 5 ns CL = 15 pF 7
Propagation Delay Enable to Output (Low to High Impedance) (3.3 V) tPLZ 5 ns CL = 15 pF 7
Propagation Delay Enable to Output (High Impedance to High) (3.3 V) tPZH 5 ns CL = 15 pF 7
Propagation Delay Enable to Output (High Impedance to Low) (3.3 V) tPZL 5 ns CL = 15 pF 7
Pulse Width Distortion (3.3 V) PWD 10 ns CL = 15 pF 7
Propagation Delay Skew (3.3 V) tPSK 10 ns CL = 15 pF 7
Output Rise Time (10%-90%) (3.3 V) tR 1 3 ns CL = 15 pF 7
Output Fall Time (10%-90%) (3.3 V) tF 1 3 ns CL = 15 pF 7
Common Mode Transient Immunity (3.3 V) /CMH/,/CML/ 30 50 kV/µs VCM = 1500 VDC, tTRANSIENT = 25 ns 7
Channel-to-Channel Skew (3.3 V) tCSK 3 5 ns CL = 15 pF 7
SYNC Internal Clock Off Time (3.3 V) tOFF 5 ns 7
Dynamic Power Consumption (3.3 V) 140 240 µA/Mbps per channel 7
Input Quiescent Supply Current IL514, IL521 (5 V) IDD1 1.8 2.5 mA 8
Output Quiescent Supply Current IL511, IL514, IL516 (5 V) IDD2 3.6 5 mA 8
Logic Input Current (5 V) II -10 10 µA 8
Logic Low Output Voltage (5 V) VOL 0 0.1 V IO = 20 µA, VI = VIL 8
Logic Low Output Voltage (5 V) VOL 0.8 V IO = 4 mA, VI = VIL 8
Dynamic Power Consumption (5 V) 200 340 µA/Mbps per channel 8

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Blank = 80/20 Tin/Lead Plating E = RoHS Compliant 15

CAD (KiCad official)

  • Symbol: IL514-3ETR7
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: il514-3etr7-etched.step / il514-3etr7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); il514-3etr7.step / il514-3etr7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NVE datasheet (18 pp, sha256 aae4c317c56af44b, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF