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IKCM20L60GDXKMA1

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Infineon Technologies Intelligent Power Modules (IPM), DIP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttriode-mos tube-transistorikcm20l60gdxkma1factory-2.0.0extractor-text

Verified IKCM20L60GDXKMA1

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 24 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: IKCM20L60GDXKMA1 · DIP-24 · 24 pins
  • ✓copper: 24 copper pads, none touching another net
  • ✓datasheet: all 24 pin names found in the 17-page datasheet
  • ✓distributor: lcsc C3615444, digikey IKCM20L60GDXKMA1-ND, mouser 726-IKCM20L60GDXKMA1
  • ✓family: DIP-24_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-h1i4bttz/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 24 pins = 24 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 24 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ikcm20l60gdxkma1.kicad_sym✓ ikcm20l60gdxkma1.kicad_mod✓ ikcm20l60gdxkma1.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 7d ago
viewers ikcm20l60gdxkma1: viewers · Ray 7d ago
ikcm20l60gdxkma1-etched.glb Publish 0.1.0 · Ray 7d ago
ikcm20l60gdxkma1-etched.step ikcm20l60gdxkma1: factory component page (tier=mfr) · Ray 7d ago
ikcm20l60gdxkma1-hero.glb ikcm20l60gdxkma1: hero GLB from the etched model (keeps the MPN mark) · Ray 7d ago
ikcm20l60gdxkma1-hero.overlay.json Publish 0.1.0 · Ray 7d ago
ikcm20l60gdxkma1.glb Publish 0.1.0 · Ray 7d ago
ikcm20l60gdxkma1.kicad_mod Publish 0.1.0 · Ray 7d ago
ikcm20l60gdxkma1.kicad_sym Publish 0.1.0 · Ray 7d ago
ikcm20l60gdxkma1.lbr Publish 0.1.0 · Ray 7d ago
ikcm20l60gdxkma1.step Publish 0.1.0 · Ray 7d ago
package.json Publish 0.1.0 · Ray 7d ago
page.json Set visibility: public · Ray 7d ago
README.md Publish 0.1.0 · Ray 7d ago
verification.json Verified: Published by the parts factory: tier mfr, 24 pins · Ray 7d ago

IKCM20L60GDXKMA1

Infineon Technologies · Intelligent Power Modules (IPM) · DIP-24

IKCM20L60GDXKMA1 from Infineon Technologies, in a DIP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VS(U) power_in U-phase high side floating IC supply offset voltage; tolerates -50V transient negative voltage relative to VSS.
2 VB(U) power_in U-phase high side floating IC supply voltage, VBS recommended 13.5V to 18.5V, supplied by integrated bootstrap circuit.
3 VS(V) power_in V-phase high side floating IC supply offset voltage; tolerates -50V transient negative voltage relative to VSS.
4 VB(V) power_in V-phase high side floating IC supply voltage, VBS recommended 13.5V to 18.5V, supplied by integrated bootstrap circuit.
5 VS(W) power_in W-phase high side floating IC supply offset voltage; tolerates -50V transient negative voltage relative to VSS.
6 VB(W) power_in W-phase high side floating IC supply voltage, VBS recommended 13.5V to 18.5V, supplied by integrated bootstrap circuit.
7 HIN(U) input U-phase high side gate driver input, positive logic, LSTTL/CMOS compatible down to 3.3V, internal 5k pull-down.
8 HIN(V) input V-phase high side gate driver input, positive logic, LSTTL/CMOS compatible down to 3.3V, internal 5k pull-down.
9 HIN(W) input W-phase high side gate driver input, positive logic, LSTTL/CMOS compatible down to 3.3V, internal 5k pull-down.
10 LIN(U) input U-phase low side gate driver input, positive logic, LSTTL/CMOS compatible down to 3.3V, internal 5k pull-down.
11 LIN(V) input V-phase low side gate driver input, positive logic, LSTTL/CMOS compatible down to 3.3V, internal 5k pull-down.
12 LIN(W) input W-phase low side gate driver input, positive logic, LSTTL/CMOS compatible down to 3.3V, internal 5k pull-down.
13 VDD power_in Low side control supply, recommended 14.5V to 18.5V (typ 16V), absolute max 20V, UV lockout at 10.4V falling.
14 VFO output Open-drain fault output indicating VDD undervoltage or ITRIP overcurrent, also gives access to the NTC thermistor referenced to VSS; external pull-up required.
15 ITRIP input Over current shutdown input with typ 0.47V comparator threshold referenced to VSS and typ 530ns input noise filter.
16 VSS power_in Low side control negative supply and logic ground reference.
17 NW passive W-phase low side emitter (open emitter) for phase current measurement; keep connection to VSS short.
18 NV passive V-phase low side emitter (open emitter) for phase current measurement; keep connection to VSS short.
19 NU passive U-phase low side emitter (open emitter) for phase current measurement; keep connection to VSS short.
20 W passive Motor W-phase output (high side emitter and low side collector).
21 V power_in Motor V-phase output (high side emitter and low side collector).
22 U passive Motor U-phase output (high side emitter and low side collector).
23 P power_in Positive bus input voltage for the high side IGBTs; VPN max 450V, surge 500V.
24 NC unconnected No connection.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package DIP-24
Category Triode/MOS Tube/Transistor
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature range Tstg -40 125 °C 7
Isolation test voltage RMS VISOL 2000 V f = 60Hz, t = 1min 7
Operating case temperature range TC -40 125 °C Refer to Figure 6 7
Max. blocking voltage VCES 600 V IC = 250µA 7
DC link supply voltage of P-N VPN 450 V Applied between P-N 7
DC link supply voltage (surge) of P-N VPN(surge) 500 V Applied between P-N 7
Output current IC -20 20 A TC = 25°C, TJ < 150°C 7
Maximum peak output current IC(peak) -40 40 A TC = 25°C, less than 1ms 7
Short circuit withstand time tSC 5 µs VDC ≤ 400V, TJ = 150°C 7
Power dissipation per IGBT Ptot 67.5 W 7
Operating junction temperature range TJ -40 150 °C 7
Single IGBT thermal resistance, junction-case RthJC 1.85 K/W 7
Single diode thermal resistance, junction-case RthJCD 2.85 K/W 7
Module supply voltage VDD -1 20 V 7
High side floating supply voltage (VB vs. VS) VBS -1 20 V 7
Input voltage LIN, HIN VIN -1 10 V 7
Input voltage ITRIP VITRIP -1 10 V 7
Switching frequency fPWM 20 kHz 7
DC link supply voltage of P-N VPN 0 400 V 8
High side floating supply voltage (VB vs. VS) VBS 13.5 18.5 V 8
Low side supply voltage VDD 14.5 16 18.5 V 8
Control supply variation ΔVBS, ΔVDD -1 1 V/µs 8
Logic input voltages LIN, HIN VIN 0 5 V 8
Logic input voltage ITRIP VITRIP 0 5 V 8
Between VSS - N (including surge) VSS -5 5 V 8
Collector-Emitter saturation voltage VCE(sat) 1.55 2.1 V IC = 15A, TJ = 25°C 9
Collector-Emitter saturation voltage VCE(sat) 1.85 V IC = 15A, TJ = 150°C 9
Diode forward voltage VF 1.7 2.4 V IF= 15A, TJ = 25°C 9
Diode forward voltage VF 1.7 V IF= 15A, TJ = 150°C 9
Collector-Emitter leakage current ICES 1 mA VCE = 600V 9
Logic 1 input voltage (LIN, HIN) VIH 2.1 2.5 V 9
Logic 0 input voltage (LIN, HIN) VIL 0.7 0.9 V 9
ITRIP positive going threshold VIT,TH+ 400 470 540 mV 9
ITRIP input hysteresis VIT,HYS 40 70 mV 9
VDD and VBS supply under voltage positive going threshold VDDUV+, VBSUV+ 10.8 12.1 13 V 9
VDD and VBS supply under voltage negative going threshold VDDUV-, VBSUV- 9.5 10.4 11.2 V 9
VDD and VBS supply under voltage lockout hysteresis VDDUVH, VBSUVH 1 1.7 V 9
Quiescent VBx supply current IQBS 300 500 µA VBx only, HIN = 0V 9
Quiescent VDD supply current IQDD 370 900 µA VDD only, LIN = 0V, HINX = 5V 9
Input bias current IIN+ 1 1.5 mA VIN = 5V 9
Input bias current IIN- 2 µA VIN = 0V 9
ITRIP input bias current IITRIP+ 65 150 µA VITRIP = 5V 9
VFO input bias current IFO 60 µA VFO = 5V, VITRIP = 0V 9
VFO output voltage VFO 0.5 V IFO = 10mA, VITRIP = 1V 9
Fault clear time after ITRIP-fault tFLTCLR 40 µs VITRIP = 1V 10
Deadtime between low side and high side DTPWM 1.5 µs 10
Repetitive peak reverse voltage VRRM 600 V 10
Turn-on propagation delay time ton 620 ns VLIN, HIN = 5V, IC = 15A, VDC = 300V 10
Turn-off propagation delay time toff 910 ns VLIN, HIN = 0V, IC = 15A, VDC = 300V 10
Short circuit propagation delay time tSCP 1200 ns From VIT,TH+ to 10% ISC 10
Input filter time ITRIP tITRIPmin 530 ns VITRIP = 1V 10
Input filter time at LIN, HIN tFILIN 290 ns VLIN, HIN = 0V & 5V 10
Deadtime of gate drive circuit DTIC 380 ns 10
Thermistor resistance RNTC 85 kΩ TNTC = 25°C 11
B-constant of NTC B(25/100) 4092 K 11
Mounting torque 0.49 0.78 Nm M3 screw and washer 11
Flatness -50 100 µm Refer to Figure 8 11

CAD (KiCad official)

  • Symbol: IKCM20L60GDXKMA1
  • Footprint: Package_DIP:DIP-24_W7.62mm
  • 3D model: DIP-24 (KiCad packages3D, STEP)
  • 3D model files: ikcm20l60gdxkma1-etched.step / ikcm20l60gdxkma1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ikcm20l60gdxkma1.step / ikcm20l60gdxkma1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (17 pp, sha256 8e90c3e50ff74551, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF