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IKCM10H60GA
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Infineon Technologies Intelligent Power Modules (IPM), DIP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownIKCM10H60GA
Infineon Technologies · Intelligent Power Modules (IPM) · DIP-24
IKCM10H60GA from Infineon Technologies, in a DIP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VS(U) | power_in | U-phase high side floating IC supply offset voltage, robust against transient negative voltage of -50V with respect to VSS. |
| 2 | VB(U) | power_in | U-phase high side floating IC supply voltage (VB to VS), recommended 13.5V to 18.5V, supplied by integrated bootstrap circuit. |
| 3 | VS(V) | power_in | V-phase high side floating IC supply offset voltage, robust against transient negative voltage of -50V with respect to VSS. |
| 4 | VB(V) | power_in | V-phase high side floating IC supply voltage (VB to VS), recommended 13.5V to 18.5V, supplied by integrated bootstrap circuit. |
| 5 | VS(W) | power_in | W-phase high side floating IC supply offset voltage, robust against transient negative voltage of -50V with respect to VSS. |
| 6 | VB(W) | power_in | W-phase high side floating IC supply voltage (VB to VS), recommended 13.5V to 18.5V, supplied by integrated bootstrap circuit. |
| 7 | HIN(U) | input | U-phase high side gate driver input, positive logic, Schmitt-trigger with internal ~5k pull-down, 3.3V compatible, pulse width not below 0.5µs recommended. |
| 8 | HIN(V) | input | V-phase high side gate driver input, positive logic, Schmitt-trigger with internal ~5k pull-down, 3.3V compatible, pulse width not below 0.5µs recommended. |
| 9 | HIN(W) | input | W-phase high side gate driver input, positive logic, Schmitt-trigger with internal ~5k pull-down, 3.3V compatible, pulse width not below 0.5µs recommended. |
| 10 | LIN(U) | input | U-phase low side gate driver input, positive logic, Schmitt-trigger with internal ~5k pull-down, 3.3V compatible, pulse width not below 0.5µs recommended. |
| 11 | LIN(V) | input | V-phase low side gate driver input, positive logic, Schmitt-trigger with internal ~5k pull-down, 3.3V compatible, pulse width not below 0.5µs recommended. |
| 12 | LIN(W) | input | W-phase low side gate driver input, positive logic, Schmitt-trigger with internal ~5k pull-down, 3.3V compatible, pulse width not below 0.5µs recommended. |
| 13 | VDD | power_in | Low side control supply for input logic and output power stage, recommended 14.5V to 18.5V (typ. 16V), UV lockout falling at 10.4V typ. |
| 14 | VFO | bidirectional | Open-drain fault output on VDD undervoltage or ITRIP overcurrent and direct NTC thermistor access referenced to VSS, requires external pull-up. |
| 15 | ITRIP | input | Over current shutdown input with comparator threshold typ. 0.47V referenced to VSS, noise filter typ. 530ns, shuts down all outputs. |
| 16 | VSS | power_in | Low side control negative supply and logic reference ground, to be connected short to the N emitter pins. |
| 17 | NW | passive | W-phase low side IGBT emitter (open emitter) available for phase current measurement, keep connection to VSS short. |
| 18 | NV | passive | V-phase low side IGBT emitter (open emitter) available for phase current measurement, keep connection to VSS short. |
| 19 | NU | passive | U-phase low side IGBT emitter (open emitter) available for phase current measurement, keep connection to VSS short. |
| 20 | W | output | Motor W-phase output, high side emitter and low side collector. |
| 21 | V | power_in | Motor V-phase output, high side emitter and low side collector. |
| 22 | U | output | Motor U-phase output, high side emitter and low side collector. |
| 23 | P | power_in | Positive bus input voltage connected to high side IGBTs, bus voltage must not exceed 450V. |
| 24 | NC | unconnected | No connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | DIP-24 |
| Category | Transistors/Thyristors |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-Emitter saturation voltage | VCE(sat) | 1.8 | 2.6 | V | IC = 6A, TJ = 25°C | 9 | |
| Collector-Emitter saturation voltage | VCE(sat) | 2.3 | V | IC = 6A, TJ = 150°C | 9 | ||
| Diode forward voltage | VF | 1.75 | 2.35 | V | IF = 6A, TJ = 25°C | 9 | |
| Diode forward voltage | VF | 1.8 | V | IF = 6A, TJ = 150°C | 9 | ||
| Collector-Emitter leakage current | ICES | 1 | mA | VCE = 600V | 9 | ||
| Logic 1 input voltage (LIN, HIN) | VIH | 2.1 | 2.5 | V | 9 | ||
| Logic 0 input voltage (LIN, HIN) | VIL | 0.7 | 0.9 | V | 9 | ||
| ITRIP positive going threshold | VIT,TH+ | 400 | 470 | 540 | mV | 9 | |
| ITRIP input hysteresis | VIT,HYS | 40 | 70 | mV | 9 | ||
| VDD and VBS supply undervoltage positive going threshold | VDDUV+, VBSUV+ | 10.8 | 12.1 | 13 | V | 9 | |
| VDD and VBS supply undervoltage negative going threshold | VDDUV-, VBSUV- | 9.5 | 10.4 | 11.2 | V | 9 | |
| VDD and VBS undervoltage lockout hysteresis | VDDUVH, VBSUVH | 1 | 1.7 | V | 9 | ||
| Input clamp voltage (HIN, LIN, ITRIP) | VINCLAMP | 9 | 10.1 | 12.5 | V | Iin=4mA | 9 |
| Quiescent VBx supply current | IQBS | 300 | 500 | µA | VBx only, HIN = 0V | 9 | |
| Quiescent VDD supply current | IQDD | 370 | 900 | µA | VDD only, LIN = 0V, HINX = 5V | 9 | |
| Input bias current | IIN+ | 1 | 1.5 | mA | VIN = 5V | 9 | |
| ITRIP input bias current | IITRIP+ | 65 | 150 | µA | VITRIP = 5V | 9 | |
| Fault clear time after ITRIP-fault | tFLTCLR | 40 | 65 | 200 | µs | VITRIP = 1V | 10 |
| Deadtime between low side and high side | DTPWM | 0.5 | µs | 10 | |||
| Repetitive peak reverse voltage | VRRM | 600 | V | 10 | |||
| Input bias current | IIN- | 2 | µA | VIN = 0V | 9 | ||
| VFO input bias current | IFO | 60 | µA | VFO = 5V, VITRIP = 0V | 9 | ||
| VFO output voltage | VFO | 0.5 | V | IFO = 10mA, VITRIP = 1V | 9 | ||
| Turn-on propagation delay time | ton | 600 | ns | VLIN, HIN = 5V, IC = 6A, VDC = 300V | 10 | ||
| Turn-off propagation delay time | toff | 770 | ns | VLIN, HIN = 0V, IC = 6A, VDC = 300V | 10 | ||
| Deadtime of gate drive circuit | DTIC | 380 | ns | 10 | |||
| IGBT turn-on energy | Eon | 95 | µJ | VDC = 300V, IC = 6A, TJ = 25°C | 10 | ||
| IGBT turn-off energy | Eoff | 95 | µJ | VDC = 300V, IC = 6A, TJ = 25°C | 10 | ||
| Bootstrap diode resistance | RBS1 | 40 | Ω | VS2 and VS3 = 0V, TJ = 25°C | 10 | ||
| NTC resistance | RNTC | 85 | kΩ | TNTC = 25°C | 11 | ||
| NTC B-constant | B(25/100) | 4092 | K | 11 | |||
| Storage temperature range | Tstg | -40 | 125 | °C | 7 | ||
| Isolation test voltage | VISOL | 2000 | V | RMS, f = 60Hz, t = 1min | 7 | ||
| Operating case temperature range | TC | -40 | 125 | °C | Refer to Figure 6 | 7 | |
| Max. blocking voltage | VCES | 600 | V | IC = 250µA | 7 | ||
| DC link supply voltage of P-N | VPN | 450 | V | Applied between P-N | 7 | ||
| DC link supply voltage (surge) of P-N | VPN(surge) | 500 | V | Applied between P-N | 7 | ||
| Output current | IC | -10 | 10 | A | TC = 25°C, TJ < 150°C | 7 | |
| Output current | IC | -6 | 6 | A | TC = 80°C, TJ < 150°C | 7 | |
| Maximum peak output current | IC(peak) | -16 | 16 | A | less than 1ms | 7 | |
| Short circuit withstand time | tSC | 5 | µs | VDC ≤ 400V, TJ = 150°C | 7 | ||
| Power dissipation per IGBT | Ptot | 23.1 | W | 7 | |||
| Operating junction temperature range | TJ | -40 | 150 | °C | 7 | ||
| Module supply voltage | VDD | -1 | 20 | V | 7 | ||
| High side floating supply voltage | VBS | -1 | 20 | V | VB vs. VS | 7 | |
| Input voltage LIN, HIN | VIN | -1 | 10 | V | 7 | ||
| Input voltage ITRIP | VITRIP | -1 | 10 | V | 7 | ||
| Switching frequency | fPWM | 20 | kHz | 7 | |||
| DC link supply voltage of P-N | VPN | 0 | 450 | V | 8 | ||
| High side floating supply voltage | VBS | 13.5 | 18.5 | V | VB vs. VS | 8 | |
| Low side supply voltage | VDD | 14.5 | 16 | 18.5 | V | 8 | |
| Control supply variation | ΔVBS, ΔVDD | -1 | 1 | V/µs | 8 | ||
| Logic input voltages LIN, HIN, ITRIP | VIN, VITRIP | 0 | 5 | V | 8 | ||
| Voltage between VSS - N | VSS | -5 | 5 | V | including surge | 8 | |
| Single IGBT thermal resistance, junction-case | RthJC | 5.42 | K/W | 7 | |||
| Single diode thermal resistance, junction-case | RthJCD | 6.88 | K/W | 7 | |||
| Mounting torque | 0.59 | 0.69 | 0.78 | Nm | M3 screw and washer | 11 | |
| Flatness | -50 | 100 | µm | Refer to Figure 8 | 11 |
CAD (KiCad official)
- Symbol:
IKCM10H60GA - Footprint:
Package_DIP:DIP-24_W7.62mm - 3D model: DIP-24 (KiCad packages3D, STEP)
- 3D model files:
ikcm10h60ga-etched.step/ikcm10h60ga-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ikcm10h60ga.step/ikcm10h60ga.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (17 pp, sha256
b3faaf8c0fabbe92, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).