# ID7S625SBC-R1-JSM

**JSMSEMI** · Gate Drivers · SOIC-16-300mil

ID7S625SBC-R1-JSM from JSMSEMI, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LO | output | Low-side gate drive output, swings from 0 V to VCC (4.0A source/4.0A sink capability). |
| 2 | COM | power_in | Low-side return (ground), the reference for all voltage ratings. |
| 3 | VCC | power_in | Low-side supply voltage, recommended 10 V to 20 V (absolute max 25 V). |
| 4 | NC | unconnected | No connect pin. |
| 5 | NC | unconnected | No connect pin. |
| 6 | VS | power_in | High-side floating supply return, recommended -9 V to 700 V. |
| 7 | VB | power_in | High-side floating supply, recommended VS+10 V to VS+20 V (absolute max 725 V). |
| 8 | HO | output | High-side gate drive output, swings from VS to VB. |
| 9 | NC | unconnected | No connect pin. |
| 10 | NC | unconnected | No connect pin. |
| 11 | VDD | power_in | Logic supply, recommended VSS+3 V to VSS+20 V. |
| 12 | HIN | input | High-side logic input signal, compatible with 3.3 V, 5 V and 15 V logic, in phase with HO. |
| 13 | SD | input | Shutdown logic input signal. |
| 14 | LIN | input | Low-side logic input signal, compatible with 3.3 V, 5 V and 15 V logic, in phase with LO. |
| 15 | VSS | power_in | Logic ground, offset of -5 V to +5 V relative to COM. |
| 16 | NC | unconnected | No connect pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | JSMSEMI |
| Package | SOIC-16-300mil |
| Category | Motor Driver ICs |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `ID7S625SBC-R1-JSM`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files: `id7s625sbc-r1-jsm-etched.step` / `id7s625sbc-r1-jsm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `id7s625sbc-r1-jsm.step` / `id7s625sbc-r1-jsm.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [JSMSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590907166276730880) (8 pp, sha256 `355ca24977c8dd81`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/id7s625sbc-r1-jsm-datasheet.pdf)