# ICL7665SACBAZ

**RENESAS** · Monitors & Reset Circuits · SOIC-8

ICL7665SACBAZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT1 | output | Open-drain N-channel output of detector 1 that sinks up to 20mA and is rated -0.3V to +18V with respect to GND. |
| 2 | HYST1 | output | Open-drain P-channel hysteresis output of detector 1 rated -0.3V to +18V with respect to V+ and sourcing a maximum of -25mA. |
| 3 | SET1 | input | Trip-voltage input of detector 1, compared against the internal 1.3V reference, rated from GND -0.3V to V+ +0.3V. |
| 4 | GND | power_in | Ground reference for the device; OUT1 and OUT2 are rated with respect to GND. |
| 5 | HYST2 | output | Open-drain P-channel hysteresis output of detector 2 rated -0.3V to +18V with respect to V+ and sourcing a maximum of -25mA. |
| 6 | SET2 | input | Trip-voltage input of detector 2, compared against the internal 1.3V reference, rated from GND -0.3V to V+ +0.3V. |
| 7 | OUT2 | output | Open-drain N-channel output of detector 2 that sinks up to 20mA and is rated -0.3V to +18V with respect to GND. |
| 8 | V+ | power_in | Positive supply input, operating from 1.6V to 16V over 25°C, with the device latching risk if any terminal exceeds V+ +0.3V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Supply Voltage | V+ | 1.8 |  | 16 | V | ICL7665SA, 0°C ≤ TA ≤ +70°C | 3 |
| Supply Current | I+ |  | 2.5 | 10 | µA | GND ≤ VSET1, VSET2 ≤ V+, all outputs open circuit, 0°C ≤ TA ≤ +70°C, V+ = 2V | 3 |
| Supply Current | I+ |  | 2.6 | 10 | µA | GND ≤ VSET1, VSET2 ≤ V+, all outputs open circuit, 0°C ≤ TA ≤ +70°C, V+ = 9V | 3 |
| Supply Current | I+ |  | 2.9 | 10 | µA | GND ≤ VSET1, VSET2 ≤ V+, all outputs open circuit, 0°C ≤ TA ≤ +70°C, V+ = 15V | 3 |
| Input Trip Voltage | VSET1 | 1.275 | 1.3 | 1.325 | V | ICL7665SA, V+ = 5V, TA = +25°C | 3 |
| Output Leakage Current OUT | IOLK |  | 10 | 200 | nA | VSET = 0V or VSET ≥ 2V | 4 |
| Output Leakage Current HYST | IHLK |  | -10 | -100 | nA |  | 4 |
| Output Leakage Current OUT | IOLK |  |  | 2000 | nA | V+ = 15V | 4 |
| Output Leakage Current HYST | IHLK |  |  | -500 | nA | V+ = 15V | 4 |
| Output Saturation Voltage OUT1 | VOUT1 |  | 0.2 | 0.5 | V | VSET1 = 2V, IOUT1 = 2mA, V+ = 2V | 4 |
| Output Saturation Voltage OUT1 | VOUT1 |  | 0.1 | 0.3 | V | VSET1 = 2V, IOUT1 = 2mA, V+ = 5V | 4 |
| Output Saturation Voltage OUT1 | VOUT1 |  | 0.06 | 0.2 | V | VSET1 = 2V, IOUT1 = 2mA, V+ = 15V | 4 |
| Output Saturation Voltage HYST1 | VHYST1 |  | -0.15 | -0.3 | V | VSET1 = 2V, IHYST1 = -0.5mA, V+ = 2V | 4 |
| Output Saturation Voltage HYST1 | VHYST1 |  | -0.05 | -0.15 | V | VSET1 = 2V, IHYST1 = -0.5mA, V+ = 5V | 4 |
| Output Saturation Voltage HYST1 | VHYST1 |  | -0.02 | -0.1 | V | VSET1 = 2V, IHYST1 = -0.5mA, V+ = 15V | 4 |
| Output Saturation Voltage OUT2 | VOUT2 |  | 0.2 | 0.5 | V | VSET2 = 0V, IOUT2 = 2mA, V+ = 2V | 4 |
| Output Saturation Voltage OUT2 | VOUT2 |  | 0.15 | 0.3 | V | VSET2 = 0V, IOUT2 = 2mA, V+ = 5V | 4 |
| Output Saturation Voltage OUT2 | VOUT2 |  | 0.11 | 0.25 | V | VSET2 = 0V, IOUT2 = 2mA, V+ = 15V | 4 |
| Output Saturation Voltage HYST2 | VHYST2 |  | -0.25 | -0.8 | V | VSET2 = 2V, V+ = 2V, IHYST2 = -0.2mA | 4 |
| Output Saturation Voltage HYST2 | VHYST2 |  | -0.43 | -1 | V | VSET2 = 2V, V+ = 5V, IHYST2 = -0.5mA | 4 |
| Output Saturation Voltage HYST2 | VHYST2 |  | -0.35 | -0.8 | V | VSET2 = 2V, V+ = 15V, IHYST2 = -0.5mA | 4 |
| VSET Input Leakage Current | ISET |  | 0.01 | 10 | nA | GND ≤ VSET ≤ V+ | 4 |
| Difference in Trip Voltages | VSET1 - VSET2 |  | 5 | 50 | mV | ROUT, RHYST = 1mW | 4 |
| Supply Voltage (absolute maximum) | V+ | -0.3 |  | 18 | V |  | 3 |
| Output Voltage OUT1 and OUT2 | OUT1, OUT2 | -0.3 |  | 18 | V | with respect to GND | 3 |
| Output Voltage HYST1 and HYST2 | HYST1, HYST2 | -0.3 |  | 18 | V | with respect to V+ | 3 |
| Maximum Sink Output Current OUT1 and OUT2 | OUT1, OUT2 |  |  | 25 | mA |  | 3 |
| Maximum Source Output Current HYST1 and HYST2 | HYST1, HYST2 | -25 |  |  | mA |  | 3 |
| Operating Temperature Range | TA | 0 |  | 70 | °C | ICL7665SC grade, 0 to +70°C ordering range | 3 |
| Maximum Junction Temperature (Plastic) | TJ |  |  | 150 | °C |  | 3 |
| Maximum Storage Temperature Range | TSTG | -65 |  | 150 | °C |  | 3 |
| Maximum Lead Temperature (Soldering) |  |  |  | 300 | °C | Soldering 10s, SOIC lead tips only | 3 |
| Thermal Resistance Junction-to-Ambient (SOIC) | JA |  | 160 |  | °C/W | Typical, component mounted on evaluation PC board in free air | 3 |

## CAD (KiCad official)

- Symbol: `ICL7665SACBAZ`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `icl7665sacbaz-etched.step` / `icl7665sacbaz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `icl7665sacbaz.step` / `icl7665sacbaz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](docs/icl7665sacbaz-datasheet.pdf) (15 pp, sha256 `fa74ffb22df27bde`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/icl7665sacbaz-datasheet.pdf)