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ICL7660SCBAZ-T
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RENESAS Charge Pumps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ICL7660SCBAZ-T
RENESAS · Charge Pumps · SOIC-8
ICL7660SCBAZ-T from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOST | input | Connecting the Boost Pin (Pin 1) to V+ increases the oscillator charge and discharge current and raises the oscillator frequency by approximately 3.5 times. |
| 2 | CAP+ | passive | Pump capacitor C1 connection; when polarized capacitors are used, the + terminal of C1 must be connected to pin 2. |
| 3 | GND | power_in | Ground reference; the output (pin 5) must not be taken more positive than GND (pin 3) or the device will latch up. |
| 4 | CAP- | passive | Pump capacitor return and reservoir-side node; an external Schottky diode from VOUT to CAP- may be needed to prevent latch-up when VIN is above 5V with a fast input rise rate. |
| 5 | VOUT | output | Negative converter output, VOUT = -VIN, which must not be pulled more positive than GND (pin 3) to avoid latch-up. |
| 6 | LV | input | Tie to GND to bypass the internal series regulator for low-voltage operation (1.5V to 3.5V supply), and leave floating for supplies above 3.5V to prevent latch-up. |
| 7 | OSC | input | Oscillator terminal where an external capacitor lowers the nominal 10kHz oscillator frequency, or where an external clock may overdrive the oscillator. |
| 8 | V+ | power_in | Positive supply input; high-range operation is 3.0V to 12V with LV open and absolute maximum supply is +13.0V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Current (RL open, +25 C) | I+ | 80 | 160 | µA | RL = ∞, +25°C | 3 | |
| Supply Current (0 to +70 C) | I+ | 180 | µA | 0°C < TA < +70°C | 3 | ||
| Supply Voltage Range - High | V+H | 3 | 12 | V | RL = 10k, LV Open, TMIN < TA < TMAX | 3 | |
| Supply Voltage Range - Low | V+L | 1.5 | 3.5 | V | RL = 10k, LV to GND, TMIN < TA < TMAX | 3 | |
| Output Source Resistance (+25 C) | ROUT | 60 | 100 | Ω | IOUT = 20mA | 3 | |
| Output Source Resistance (0 to +70 C) | ROUT | 120 | Ω | IOUT = 20mA, 0°C < TA < +70°C | 3 | ||
| Output Source Resistance (V+ = 2V, 0 to +70 C) | ROUT | 250 | Ω | IOUT = 3mA, V+ = 2V, LV = GND, 0°C < TA < +70°C | 3 | ||
| Oscillator Frequency | fOSC | 5 | 10 | kHz | COSC = 0, Pin 1 Open or GND | 3 | |
| Power Efficiency | PEFF | 96 | 98 | % | RL = 5k | 3 | |
| Power Efficiency (TMIN to TMAX) | PEFF | 95 | 97 | % | TMIN < TA < TMAX, RL = 5k | 3 | |
| Voltage Conversion Efficiency | VOUTEFF | 99 | 99.9 | % | RL = ∞ | 3 | |
| Supply Voltage | 13 | V | 3 | ||||
| LV and OSC Input Voltage (lower limit) | -0.3 | V | V+ < 5.5V; upper limit printed as V+ + 0.3V | 3 | |||
| Current into LV | 20 | µA | V+ > 3.5V | 3 | |||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Operating Temperature Range (ICL7660SC) | 0 | 70 | °C | ICL7660SC, ICL7660AC | 3 | ||
| Thermal Resistance Junction-to-Ambient (8 Ld Plastic SOIC) | θJA | 160 | °C/W | Typical, Notes 6, 7 | 3 | ||
| Thermal Resistance Junction-to-Case (8 Ld Plastic SOIC) | θJC | 48 | °C/W | Typical, Notes 6, 7 | 3 |
CAD (KiCad official)
- Symbol:
ICL7660SCBAZ-T - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
icl7660scbaz-t-etched.step/icl7660scbaz-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);icl7660scbaz-t.step/icl7660scbaz-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (13 pp, sha256
1210288c24613941, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ICL7660SCBAZ-T
**RENESAS** · Charge Pumps · SOIC-8
ICL7660SCBAZ-T from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOST | input | Connecting the Boost Pin (Pin 1) to V+ increases the oscillator charge and discharge current and raises the oscillator frequency by approximately 3.5 times. |
| 2 | CAP+ | passive | Pump capacitor C1 connection; when polarized capacitors are used, the + terminal of C1 must be connected to pin 2. |
| 3 | GND | power_in | Ground reference; the output (pin 5) must not be taken more positive than GND (pin 3) or the device will latch up. |
| 4 | CAP- | passive | Pump capacitor return and reservoir-side node; an external Schottky diode from VOUT to CAP- may be needed to prevent latch-up when VIN is above 5V with a fast input rise rate. |
| 5 | VOUT | output | Negative converter output, VOUT = -VIN, which must not be pulled more positive than GND (pin 3) to avoid latch-up. |
| 6 | LV | input | Tie to GND to bypass the internal series regulator for low-voltage operation (1.5V to 3.5V supply), and leave floating for supplies above 3.5V to prevent latch-up. |
| 7 | OSC | input | Oscillator terminal where an external capacitor lowers the nominal 10kHz oscillator frequency, or where an external clock may overdrive the oscillator. |
| 8 | V+ | power_in | Positive supply input; high-range operation is 3.0V to 12V with LV open and absolute maximum supply is +13.0V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Current (RL open, +25 C) | I+ | | 80 | 160 | µA | RL = ∞, +25°C | 3 |
| Supply Current (0 to +70 C) | I+ | | | 180 | µA | 0°C < TA < +70°C | 3 |
| Supply Voltage Range - High | V+H | 3 | | 12 | V | RL = 10k, LV Open, TMIN < TA < TMAX | 3 |
| Supply Voltage Range - Low | V+L | 1.5 | | 3.5 | V | RL = 10k, LV to GND, TMIN < TA < TMAX | 3 |
| Output Source Resistance (+25 C) | ROUT | | 60 | 100 | Ω | IOUT = 20mA | 3 |
| Output Source Resistance (0 to +70 C) | ROUT | | | 120 | Ω | IOUT = 20mA, 0°C < TA < +70°C | 3 |
| Output Source Resistance (V+ = 2V, 0 to +70 C) | ROUT | | | 250 | Ω | IOUT = 3mA, V+ = 2V, LV = GND, 0°C < TA < +70°C | 3 |
| Oscillator Frequency | fOSC | 5 | 10 | | kHz | COSC = 0, Pin 1 Open or GND | 3 |
| Power Efficiency | PEFF | 96 | 98 | | % | RL = 5k | 3 |
| Power Efficiency (TMIN to TMAX) | PEFF | 95 | 97 | | % | TMIN < TA < TMAX, RL = 5k | 3 |
| Voltage Conversion Efficiency | VOUTEFF | 99 | 99.9 | | % | RL = ∞ | 3 |
| Supply Voltage | | | | 13 | V | | 3 |
| LV and OSC Input Voltage (lower limit) | | -0.3 | | | V | V+ < 5.5V; upper limit printed as V+ + 0.3V | 3 |
| Current into LV | | | | 20 | µA | V+ > 3.5V | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| Operating Temperature Range (ICL7660SC) | | 0 | | 70 | °C | ICL7660SC, ICL7660AC | 3 |
| Thermal Resistance Junction-to-Ambient (8 Ld Plastic SOIC) | θJA | | 160 | | °C/W | Typical, Notes 6, 7 | 3 |
| Thermal Resistance Junction-to-Case (8 Ld Plastic SOIC) | θJC | | 48 | | °C/W | Typical, Notes 6, 7 | 3 |
## CAD (KiCad official)
- Symbol: `ICL7660SCBAZ-T`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `icl7660scbaz-t-etched.step` / `icl7660scbaz-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `icl7660scbaz-t.step` / `icl7660scbaz-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [RENESAS datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883807134470144) (13 pp, sha256 `1210288c24613941`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/icl7660scbaz-t-datasheet.pdf)