# ICL7621DCPAZ

**RENESAS** · Pre-ordered Chips · PDIP-8

ICL7621DCPAZ from RENESAS, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Output of amplifier A, which swings to within a few millivolts of the supply rails and is fully protected against short circuits to ground or either supply for VSUPPLY up to 10V. |
| 2 | -INA | input | Inverting input of amplifier A, internally protected, with typical input current of 1pA, and no voltage greater than 0.3V beyond the supply rails may be applied to it. |
| 3 | +INA | input | Non-inverting input of amplifier A, internally protected, with typical input current of 1pA, and no voltage greater than 0.3V beyond the supply rails may be applied to it. |
| 4 | V- | power_in | Negative supply terminal; the amplifier operates from supply voltages of 1V to 8V, with absolute maximum V+ to V- of 18V. |
| 5 | +INB | input | Non-inverting input of amplifier B, internally protected, with typical input current of 1pA, and no voltage greater than 0.3V beyond the supply rails may be applied to it. |
| 6 | -INB | input | Inverting input of amplifier B, internally protected, with typical input current of 1pA, and no voltage greater than 0.3V beyond the supply rails may be applied to it. |
| 7 | OUTB | output | Output of amplifier B, which swings to within a few millivolts of the supply rails and is fully protected against short circuits to ground or either supply for VSUPPLY up to 10V. |
| 8 | V+ | power_in | Positive supply terminal; the amplifier operates from supply voltages of 1V to 8V, with absolute maximum V+ to V- of 18V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | PDIP-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS |  |  | 15 | mV | RS 100k, +25°C | 2 |
| Input Offset Voltage | VOS |  |  | 20 | mV | RS 100k, Full temperature range | 2 |
| Input Offset Current | IOS |  | 0.5 | 30 | pA | +25°C | 2 |
| Input Offset Current | IOS |  |  | 300 | pA | 0 to +70°C | 2 |
| Input Offset Current | IOS |  |  | 800 | pA | -55 to +125°C | 2 |
| Input Bias Current | IBIAS |  | 1 | 50 | pA | +25°C | 2 |
| Input Bias Current | IBIAS |  |  | 400 | pA | 0 to +70°C | 2 |
| Input Bias Current | IBIAS |  |  | 4000 | pA | -55 to +125°C | 2 |
| Common Mode Voltage Range | VCMR | 4.2 |  |  | V | IQ = 100µA, +25°C | 2 |
| Output Voltage Swing | VOUT | 4.9 |  |  | V | IQ = 100µA, RL = 100k, +25°C | 2 |
| Output Voltage Swing | VOUT | 4.8 |  |  | V | IQ = 100µA, RL = 100k, 0 to +70°C | 2 |
| Output Voltage Swing | VOUT | 4.5 |  |  | V | IQ = 100µA, RL = 100k, -55 to +125°C | 2 |
| Large Signal Voltage Gain | AVOL | 80 | 102 |  | dB | VO = 4.0V, RL = 100k, IQ = 100µA, +25°C | 2 |
| Large Signal Voltage Gain | AVOL | 75 |  |  | dB | VO = 4.0V, RL = 100k, IQ = 100µA, 0 to +70°C | 2 |
| Large Signal Voltage Gain | AVOL | 68 |  |  | dB | VO = 4.0V, RL = 100k, IQ = 100µA, -55 to +125°C | 2 |
| Common Mode Rejection Ratio | CMRR | 70 | 91 |  | dB | RS 100k, IQ = 100µA, +25°C | 2 |
| Power Supply Rejection Ratio | PSRR | 80 | 86 |  | dB | RS 100k, IQ = 100µA, VSUPPLY = 8V to 2V, +25°C | 2 |
| Temperature Coefficient of VOS | VOS/T |  | 25 |  | µV/oC | RS 100k | 2 |
| Unity Gain Bandwidth | GBW |  | 0.48 |  | MHz | IQ = 100µA, +25°C | 2 |
| Input Resistance | RIN |  | 1012 |  |  | +25°C | 2 |
| Input Referred Noise Voltage | eN |  | 100 |  | nV/Hz | RS = 100, f = 1kHz, +25°C | 2 |
| Input Referred Noise Current | iN |  | 0.01 |  | pA/Hz | RS = 100, f = 1kHz, +25°C | 2 |
| Supply Current (Per Amplifier) | ISUPPLY |  | 0.1 | 0.25 | mA | No Signal, No Load, IQ = 100µA, +25°C | 2 |
| Wide Operating Voltage Range | VSUPPLY | 1 |  | 8 | V | Supply voltage V+ to V- (features) | 1 |
| Operating Temperature Range |  | 0 |  | 70 | °C | Temperature range | 2 |
| Maximum Junction Temperature |  |  |  | 150 | °C | Plastic package | 2 |
| Maximum Storage Temperature Range |  | -65 |  | 150 | °C | Storage | 2 |
| Thermal Resistance Junction-to-Ambient (PDIP) | θJA |  | 120 |  | °C/W | Typical, Note 5, PDIP package | 2 |

## CAD (KiCad official)

- Symbol: `ICL7621DCPAZ`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files: `icl7621dcpaz-etched.step` / `icl7621dcpaz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `icl7621dcpaz.step` / `icl7621dcpaz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](docs/icl7621dcpaz-datasheet.pdf) (9 pp, sha256 `4b8ad541cc8211be`, retrieved 2026-11-02, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/icl7621dcpaz-datasheet.pdf)