component
ICL3221ECVZ-T
Public Made by Adomby adom
Intersil(Renesas Electronics) RS232 ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ICL3221ECVZ-T
Intersil(Renesas Electronics) · RS232 ICs · TSSOP-16
ICL3221ECVZ-T from Intersil(Renesas Electronics), in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Active low receiver enable control; doesn't disable ROUTB outputs. |
| 2 | C1+ | passive | External capacitor (voltage doubler) is connected to this lead. |
| 3 | V+ | power_out | Internally generated positive transmitter supply (+5.5V). |
| 4 | C1- | passive | External capacitor (voltage doubler) is connected to this lead. |
| 5 | C2+ | passive | External capacitor (voltage inverter) is connected to this lead. |
| 6 | C2- | passive | External capacitor (voltage inverter) is connected to this lead. |
| 7 | V- | power_out | Internally generated negative transmitter supply (-5.5V). |
| 8 | R1IN | input | ±15kV ESD protected, RS-232 compatible receiver input. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Intersil(Renesas Electronics) |
| Package | TSSOP-16 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC to GND | VCC | -0.3 | 6 | V | 12 | ||
| V+ to GND | V+ | -0.3 | 7 | V | 12 | ||
| V- to GND | V- | -7 | 0.3 | V | 12 | ||
| V+ to V- | 14 | V | 12 | ||||
| Input voltages TIN, FORCEOFF, FORCEON, EN, SHDN | -0.3 | 6 | V | 12 | |||
| RIN input voltage | -25 | 25 | V | 12 | |||
| TOUT output voltage | -13.2 | 13.2 | V | 12 | |||
| ROUT, INVALID output voltage (lower limit) | -0.3 | V | 12 | ||||
| Maximum junction temperature (plastic package) | 150 | °C | 12 | ||||
| Maximum storage temperature range | -65 | 150 | °C | 12 | |||
| Temperature range ICL32xxECX | 0 | 70 | °C | ICL32xxECX | 12 | ||
| Supply voltage VCC | VCC | 3 | 5.5 | V | Electrical Specifications test condition VCC = 3V to 5.5V | 12 | |
| Rx input voltage | -15 | 15 | V | 12 | |||
| Supply Current, Automatic Power-Down | 1 | 10 | µA | All RIN Open, FORCEON = GND, FORCEOFF = VCC (ICL3221E, ICL3223E, ICL3243E Only) | 12 | ||
| Supply Current, Power-Down | 1 | 10 | µA | FORCEOFF = SHDN = GND (Except ICL3232E) | 12 | ||
| Supply Current, Automatic Power-Down Disabled | 0.3 | 1 | mA | All Outputs Unloaded, FORCEON = FORCEOFF = SHDN = VCC; VCC = 3.15V, ICL3221 | 12 | ||
| Input Logic Threshold Low | 0.8 | V | TIN, FORCEON, FORCEOFF, EN, SHDN | 12 | |||
| Input Logic Threshold High | 2 | V | TIN, FORCEON, FORCEOFF, EN, SHDN; VCC = 3.3V | 12 | |||
| Input Logic Threshold High | 2.4 | V | TIN, FORCEON, FORCEOFF, EN, SHDN; VCC = 5.0V | 12 | |||
| Input Leakage Current | 0.01 | 1 | µA | TIN, FORCEON, FORCEOFF, EN, SHDN | 12 | ||
| Output Leakage Current (Except ICL3232E) | 0.05 | 10 | µA | FORCEOFF = GND or EN = VCC | 12 | ||
| Output Voltage Low | 0.4 | V | IOUT = 1.6mA | 12 | |||
| Receiver Input Thresholds to Enable Transmitters | -2.7 | 2.7 | V | ICL32xxE Powers Up (see Figure 6) | 13 | ||
| Receiver Input Thresholds to Disable Transmitters | -0.3 | 0.3 | V | ICL32xxE Powers Down (see Figure 6) | 13 | ||
| INVALID Output Voltage Low | 0.4 | V | IOUT = 1.6mA | 13 | |||
| Input Voltage Range | -25 | 25 | V | 13 | |||
| Input Threshold Low | 0.6 | 1.2 | V | VCC = 3.3V | 13 | ||
| Input Threshold Low | 0.8 | 1.5 | V | VCC = 5.0V | 13 | ||
| Input Threshold High | 1.5 | 2.4 | V | VCC = 3.3V | 13 | ||
| Input Threshold High | 1.8 | 2.4 | V | VCC = 5.0V | 13 | ||
| Input Resistance | 3 | 5 | 7 | kΩ | 13 | ||
| Output Voltage Swing | 5 | 5.4 | V | All Transmitter Outputs Loaded with 3kΩ to Ground | 13 | ||
| Output Resistance | 300 | Ω | VCC = V+ = V- = 0V, Transmitter Output = 2V | 13 | |||
| Output Short-Circuit Current | 35 | 60 | mA | 13 | |||
| Output Leakage Current | 25 | µA | VOUT = 12V, VCC = 0V or 3V to 5.5V, Automatic Power-Down or FORCEOFF = SHDN = GND | 13 | |||
| Maximum Data Rate | 250 | 500 | kbps | RL = 3kΩ, CL = 1000pF, One Transmitter Switching | 13 | ||
| Transition Region Slew Rate | 4 | 30 | V/µs | VCC = 3.3V, RL = 3kΩ to 7kΩ, measured from 3V to -3V or -3V to 3V, CL = 150pF to 2500pF | 13 | ||
| Transition Region Slew Rate | 6 | 30 | V/µs | VCC = 3.3V, RL = 3kΩ to 7kΩ, measured from 3V to -3V or -3V to 3V, CL = 150pF to 1000pF | 13 | ||
| Thermal resistance ΘJA, 16 Ld TSSOP package | ΘJA | 145 | °C/W | Typical, Note 4 (component on low effective thermal conductivity test board, free air) | 12 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. | 7 |
CAD (KiCad official)
- Symbol:
ICL3221ECVZ-T - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
icl3221ecvz-t-etched.step/icl3221ecvz-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);icl3221ecvz-t.step/icl3221ecvz-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Intersil(Renesas Electronics) datasheet (33 pp, sha256
a7661a123a2b2ff6, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ICL3221ECVZ-T
**Intersil(Renesas Electronics)** · RS232 ICs · TSSOP-16
ICL3221ECVZ-T from Intersil(Renesas Electronics), in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | EN | input | Active low receiver enable control; doesn't disable ROUTB outputs. |
| 2 | C1+ | passive | External capacitor (voltage doubler) is connected to this lead. |
| 3 | V+ | power_out | Internally generated positive transmitter supply (+5.5V). |
| 4 | C1- | passive | External capacitor (voltage doubler) is connected to this lead. |
| 5 | C2+ | passive | External capacitor (voltage inverter) is connected to this lead. |
| 6 | C2- | passive | External capacitor (voltage inverter) is connected to this lead. |
| 7 | V- | power_out | Internally generated negative transmitter supply (-5.5V). |
| 8 | R1IN | input | ±15kV ESD protected, RS-232 compatible receiver input. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Intersil(Renesas Electronics) |
| Package | TSSOP-16 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC to GND | VCC | -0.3 | | 6 | V | | 12 |
| V+ to GND | V+ | -0.3 | | 7 | V | | 12 |
| V- to GND | V- | -7 | | 0.3 | V | | 12 |
| V+ to V- | | | | 14 | V | | 12 |
| Input voltages TIN, FORCEOFF, FORCEON, EN, SHDN | | -0.3 | | 6 | V | | 12 |
| RIN input voltage | | -25 | | 25 | V | | 12 |
| TOUT output voltage | | -13.2 | | 13.2 | V | | 12 |
| ROUT, INVALID output voltage (lower limit) | | -0.3 | | | V | | 12 |
| Maximum junction temperature (plastic package) | | | | 150 | °C | | 12 |
| Maximum storage temperature range | | -65 | | 150 | °C | | 12 |
| Temperature range ICL32xxECX | | 0 | | 70 | °C | ICL32xxECX | 12 |
| Supply voltage VCC | VCC | 3 | | 5.5 | V | Electrical Specifications test condition VCC = 3V to 5.5V | 12 |
| Rx input voltage | | -15 | | 15 | V | | 12 |
| Supply Current, Automatic Power-Down | | | 1 | 10 | µA | All RIN Open, FORCEON = GND, FORCEOFF = VCC (ICL3221E, ICL3223E, ICL3243E Only) | 12 |
| Supply Current, Power-Down | | | 1 | 10 | µA | FORCEOFF = SHDN = GND (Except ICL3232E) | 12 |
| Supply Current, Automatic Power-Down Disabled | | | 0.3 | 1 | mA | All Outputs Unloaded, FORCEON = FORCEOFF = SHDN = VCC; VCC = 3.15V, ICL3221 | 12 |
| Input Logic Threshold Low | | | | 0.8 | V | TIN, FORCEON, FORCEOFF, EN, SHDN | 12 |
| Input Logic Threshold High | | 2 | | | V | TIN, FORCEON, FORCEOFF, EN, SHDN; VCC = 3.3V | 12 |
| Input Logic Threshold High | | 2.4 | | | V | TIN, FORCEON, FORCEOFF, EN, SHDN; VCC = 5.0V | 12 |
| Input Leakage Current | | | 0.01 | 1 | µA | TIN, FORCEON, FORCEOFF, EN, SHDN | 12 |
| Output Leakage Current (Except ICL3232E) | | | 0.05 | 10 | µA | FORCEOFF = GND or EN = VCC | 12 |
| Output Voltage Low | | | | 0.4 | V | IOUT = 1.6mA | 12 |
| Receiver Input Thresholds to Enable Transmitters | | -2.7 | | 2.7 | V | ICL32xxE Powers Up (see Figure 6) | 13 |
| Receiver Input Thresholds to Disable Transmitters | | -0.3 | | 0.3 | V | ICL32xxE Powers Down (see Figure 6) | 13 |
| INVALID Output Voltage Low | | | | 0.4 | V | IOUT = 1.6mA | 13 |
| Input Voltage Range | | -25 | | 25 | V | | 13 |
| Input Threshold Low | | 0.6 | 1.2 | | V | VCC = 3.3V | 13 |
| Input Threshold Low | | 0.8 | 1.5 | | V | VCC = 5.0V | 13 |
| Input Threshold High | | | 1.5 | 2.4 | V | VCC = 3.3V | 13 |
| Input Threshold High | | | 1.8 | 2.4 | V | VCC = 5.0V | 13 |
| Input Resistance | | 3 | 5 | 7 | kΩ | | 13 |
| Output Voltage Swing | | 5 | 5.4 | | V | All Transmitter Outputs Loaded with 3kΩ to Ground | 13 |
| Output Resistance | | 300 | | | Ω | VCC = V+ = V- = 0V, Transmitter Output = 2V | 13 |
| Output Short-Circuit Current | | | 35 | 60 | mA | | 13 |
| Output Leakage Current | | | | 25 | µA | VOUT = 12V, VCC = 0V or 3V to 5.5V, Automatic Power-Down or FORCEOFF = SHDN = GND | 13 |
| Maximum Data Rate | | 250 | 500 | | kbps | RL = 3kΩ, CL = 1000pF, One Transmitter Switching | 13 |
| Transition Region Slew Rate | | 4 | | 30 | V/µs | VCC = 3.3V, RL = 3kΩ to 7kΩ, measured from 3V to -3V or -3V to 3V, CL = 150pF to 2500pF | 13 |
| Transition Region Slew Rate | | 6 | | 30 | V/µs | VCC = 3.3V, RL = 3kΩ to 7kΩ, measured from 3V to -3V or -3V to 3V, CL = 150pF to 1000pF | 13 |
| Thermal resistance ΘJA, 16 Ld TSSOP package | ΘJA | | 145 | | °C/W | Typical, Note 4 (component on low effective thermal conductivity test board, free air) | 12 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | | tin | C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. | 7 |
## CAD (KiCad official)
- Symbol: `ICL3221ECVZ-T`
- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`
- 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files: `icl3221ecvz-t-etched.step` / `icl3221ecvz-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `icl3221ecvz-t.step` / `icl3221ecvz-t.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Intersil(Renesas Electronics) datasheet](docs/icl3221ecvz-t-datasheet.pdf) (33 pp, sha256 `a7661a123a2b2ff6`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/icl3221ecvz-t-datasheet.pdf)