component
ICE5QR2270AZ
Public Made by Adomby adom
Infineon Technologies AC-DC Controllers & Regulators, DIP-7. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
ICE5QR2270AZ
Infineon Technologies · AC-DC Controllers & Regulators · DIP-7
ICE5QR2270AZ from Infineon Technologies, in a DIP-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | FB pin combines the functions of feedback control, selectable burst entry/exit control and overload/open loop protection. |
| 2 | VIN | power_in | VIN pin is connected to the bus via a resistor divider to sense the line voltage and combines the functions of input Line OVP, Brownout and minimum ZC count setting for low and high line. |
| 3 | CS | input | The CS pin is connected to the external shunt resistor for primary current sensing and to the internal PWM signal generator for switch-off determination together with the feedback voltage. |
| 4 | ZCD | bidirectional | ZCD pin combines the functions of start-up, zero crossing detection and output over voltage protection, and during start-up it provides a voltage level to the gate of the power switch CoolMOS to charge the VCC capacitor. |
| 5 | DRAIN | passive | The DRAIN pin is connected to the drain of the integrated CoolMOS. |
| 7 | VCC | power_in | The VCC pin is the positive voltage supply to the IC, and its operating range is between VVCC_OFF and VVCC_OVP. |
| 8 | GND | power_in | The GND pin is the common ground of the CoolSET. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | DIP-7 |
| Category | Power Management ICs |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Pulse drain current | ID_Pulse | 5.8 | A | Pulse width tP=20 µs and limited by Tj,Max | 18 | ||
| Avalanche energy, repetitive | EAR | 0.07 | mJ | tAR limited by max. TJ=150°C with TJ,Start=25°C; ID=0.4 A, VDD=50 V | 18 | ||
| Avalanche current, repetitive | IAR | 0.4 | A | tAR limited by max. TJ=150°C with TJ,Start=25°C | 19 | ||
| Drain Source Voltage (CoolMOS) | VDS | 700 | V | Tj = 25 °C | 18 | ||
| VCC Supply Voltage | VCC | -0.3 | 27 | V | 19 | ||
| FB Voltage | VFB | -0.3 | 3.6 | V | 19 | ||
| ZCD Voltage | VZCD | -0.3 | 27 | V | 19 | ||
| CS Voltage | VCS | -0.3 | 3.6 | V | 19 | ||
| VIN Voltage | VIN | -0.3 | 3.6 | V | 19 | ||
| Maximum DC current on any pin except DRAIN & CS pins | -10 | 10 | mA | 19 | |||
| ESD robustness HBM | VESD_HBM | 2000 | V | According to EIA/JESD22 | 19 | ||
| ESD robustness CDM | VESD_CDM | 500 | V | 19 | |||
| Junction temperature range | TJ | -40 | 150 | °C | Controller & CoolMOS | 19 | |
| Storage Temperature | TSTORE | -55 | 150 | °C | 19 | ||
| Thermal Resistance (Junction-Ambient) | RthJA | 103 | K/W | Setup according to JESD51 standard and using minimum drain pin copper area in a 2 oz copper single sided PCB | 19 | ||
| Junction Temperature of controller | TjCon_op | -40 | °C | Max value limited due to OTP of controller chip | 20 | ||
| Junction Temperature of CoolMOS | TjCoolMOS_op | -40 | 150 | °C | 20 | ||
| VCC Charge Current 1 | IVCC_Charge1 | -0.35 | -0.2 | -0.09 | mA | VVCC=0V, RStartUp=50MΩ and VDRAIN=90V | 20 |
| VCC Charge Current 3 | IVCC_Charge3 | -5 | -3 | -1 | mA | VVCC=15V, RStartUp=50MΩ and VDRAIN=90V | 20 |
| VCC Turn-on Threshold Voltage | VVCC_ON | 15.3 | 16 | 16.5 | V | 20 | |
| VCC Turn-off Threshold Voltage | VVCC_OFF | 9.5 | 10 | 10.5 | V | 20 | |
| VCC Short Circuit Protection | VVCC_SCP | 1.1 | 1.9 | V | 20 | ||
| Internal Reference Voltage | VREF | 3.2 | 3.3 | 3.39 | V | Measured at pin FB IFB=0 | 21 |
| Feedback Pull-Up Resistor | RFB | 11 | 15 | 20 | kΩ | 21 | |
| PWM-OP Gain | GPWM | 1.95 | 2.05 | 2.15 | - | 21 | |
| Offset for Voltage Ramp | VPWM | 0.42 | 0.5 | 0.58 | V | 21 | |
| Maximum on time in normal operation | tOnMax | 20 | 35 | 60 | µs | 21 | |
| Maximum off time in normal operation | tOffMax | 24 | 42.5 | 71 | µs | 21 | |
| Peak current limitation in normal operation | VCS_N | 0.94 | 1 | 1.06 | V | 21 | |
| Leading Edge Blanking time | tCS_LEB | 118 | 220 | 462 | ns | 21 | |
| Peak Current Limitation in Active Burst Mode, Level 1 | VCS_BL1 | 0.26 | 0.31 | 0.36 | V | 21 | |
| Peak Current Limitation in Active Burst Mode, Level 2 | VCS_BL2 | 0.3 | 0.35 | 0.4 | V | 21 | |
| Abnormal CS voltage threshold | VCS_STG | 0.06 | 0.1 | 0.15 | V | 21 | |
| Abnormal CS voltage Sample period | tCS_STG_SAM | 2.3 | 5 | µs | 21 | ||
| Soft-Start time | tSS | 8.5 | 12 | ms | 22 | ||
| Zero crossing threshold voltage | VZCD_CT | 60 | 100 | 150 | mV | 22 | |
| Minimum ringing suppression time | tZCD_RS1 | 1.5 | 2.5 | 4.1 | µs | VZCD > VZCD,RS | 22 |
| ZCD resistance | RZCD | 2.5 | 3 | 3.5 | kΩ | Internal resistor at ZCD pin | 22 |
| VIN voltage threshold for line selection | VVIN_REF | 1.48 | 1.52 | 1.58 | V | 22 | |
| Charging current to select burst mode | Isel | 2.1 | 3 | 3.9 | µA | 23 | |
| Burst mode selection reference voltage | VREF_B | 2.65 | 2.75 | 2.85 | V | 23 | |
| Feedback voltage for entering Active Burst Mode for level 1 | VFB_EBL1 | 0.86 | 0.9 | 0.94 | V | 23 | |
| Feedback voltage for entering Active Burst Mode for level 2 | VFB_EBL2 | 1 | 1.05 | 1.1 | V | 23 | |
| Feedback voltage for leaving Active Burst Mode | VFB_LB | 2.65 | 2.75 | 2.85 | V | 23 | |
| Feedback voltage for burst-on | VFB_BOn | 2.3 | 2.4 | 2.5 | V | 23 | |
| Feedback voltage for burst-off | VFB_BOff | 1.9 | 2 | 2.1 | V | 23 | |
| Line Over Voltage threshold | VVIN_LOVP | 2.8 | 2.9 | 3 | V | 23 | |
| BrownIn threshold | VVIN_BI | 0.63 | 0.66 | 0.69 | V | 23 | |
| BrownOut threshold | VVIN_BO | 0.37 | 0.4 | 0.43 | V | 23 | |
| VCC Over Voltage threshold | VVCC_OVP | 24 | 25.5 | 27 | V | 24 | |
| Over Load Detection threshold for OLP protection at FB pin | VFB_OLP | 2.65 | 2.75 | 2.85 | V | 24 | |
| Output Over Voltage threshold | VZCD_OVP | 1.9 | 2 | 2.1 | V | 24 | |
| Over temperature protection | Tjcon_OTP | 129 | 140 | 150 | °C | Junction temperature of the controller chip (not the CoolMOS chip) | 24 |
| Drain Source Breakdown Voltage ICE5QRxx70Ax | V(BR)DSS | 700 | V | Tj = 25°C | 25 | ||
| Drain to CS On-Resistance (inclusive of low side MOSFET), ICE5QR2270AZ | RDSon | 2.13 | 2.33 | Ω | Tj = 25°C, ID =1A | 25 | |
| Drain to CS On-Resistance (inclusive of low side MOSFET), ICE5QR2270AZ at high temperature | RDSon | 4.31 | Ω | Tj=125°C1, ID =1A | 25 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | minimum drain pin copper area in a 2 oz copper single sided PCB. The output power figure is for selection purpose only. The actual | 2 |
CAD (KiCad official)
- Symbol:
ICE5QR2270AZ - Footprint:
Package_DIP:DIP-8-N6_W7.62mm - 3D model: DIP-7 (KiCad packages3D, STEP)
- 3D model files:
ice5qr2270az-etched.step/ice5qr2270az-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ice5qr2270az.step/ice5qr2270az.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (54 pp, sha256
84ae0622caa91ac4, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ICE5QR2270AZ
**Infineon Technologies** · AC-DC Controllers & Regulators · DIP-7
ICE5QR2270AZ from Infineon Technologies, in a DIP-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | FB pin combines the functions of feedback control, selectable burst entry/exit control and overload/open loop protection. |
| 2 | VIN | power_in | VIN pin is connected to the bus via a resistor divider to sense the line voltage and combines the functions of input Line OVP, Brownout and minimum ZC count setting for low and high line. |
| 3 | CS | input | The CS pin is connected to the external shunt resistor for primary current sensing and to the internal PWM signal generator for switch-off determination together with the feedback voltage. |
| 4 | ZCD | bidirectional | ZCD pin combines the functions of start-up, zero crossing detection and output over voltage protection, and during start-up it provides a voltage level to the gate of the power switch CoolMOS to charge the VCC capacitor. |
| 5 | DRAIN | passive | The DRAIN pin is connected to the drain of the integrated CoolMOS. |
| 7 | VCC | power_in | The VCC pin is the positive voltage supply to the IC, and its operating range is between VVCC_OFF and VVCC_OVP. |
| 8 | GND | power_in | The GND pin is the common ground of the CoolSET. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | DIP-7 |
| Category | Power Management ICs |
| Pins | 7 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Pulse drain current | ID_Pulse | | | 5.8 | A | Pulse width tP=20 µs and limited by Tj,Max | 18 |
| Avalanche energy, repetitive | EAR | | | 0.07 | mJ | tAR limited by max. TJ=150°C with TJ,Start=25°C; ID=0.4 A, VDD=50 V | 18 |
| Avalanche current, repetitive | IAR | | | 0.4 | A | tAR limited by max. TJ=150°C with TJ,Start=25°C | 19 |
| Drain Source Voltage (CoolMOS) | VDS | | | 700 | V | Tj = 25 °C | 18 |
| VCC Supply Voltage | VCC | -0.3 | | 27 | V | | 19 |
| FB Voltage | VFB | -0.3 | | 3.6 | V | | 19 |
| ZCD Voltage | VZCD | -0.3 | | 27 | V | | 19 |
| CS Voltage | VCS | -0.3 | | 3.6 | V | | 19 |
| VIN Voltage | VIN | -0.3 | | 3.6 | V | | 19 |
| Maximum DC current on any pin except DRAIN & CS pins | | -10 | | 10 | mA | | 19 |
| ESD robustness HBM | VESD_HBM | | | 2000 | V | According to EIA/JESD22 | 19 |
| ESD robustness CDM | VESD_CDM | | | 500 | V | | 19 |
| Junction temperature range | TJ | -40 | | 150 | °C | Controller & CoolMOS | 19 |
| Storage Temperature | TSTORE | -55 | | 150 | °C | | 19 |
| Thermal Resistance (Junction-Ambient) | RthJA | | | 103 | K/W | Setup according to JESD51 standard and using minimum drain pin copper area in a 2 oz copper single sided PCB | 19 |
| Junction Temperature of controller | TjCon_op | -40 | | | °C | Max value limited due to OTP of controller chip | 20 |
| Junction Temperature of CoolMOS | TjCoolMOS_op | -40 | | 150 | °C | | 20 |
| VCC Charge Current 1 | IVCC_Charge1 | -0.35 | -0.2 | -0.09 | mA | VVCC=0V, RStartUp=50MΩ and VDRAIN=90V | 20 |
| VCC Charge Current 3 | IVCC_Charge3 | -5 | -3 | -1 | mA | VVCC=15V, RStartUp=50MΩ and VDRAIN=90V | 20 |
| VCC Turn-on Threshold Voltage | VVCC_ON | 15.3 | 16 | 16.5 | V | | 20 |
| VCC Turn-off Threshold Voltage | VVCC_OFF | 9.5 | 10 | 10.5 | V | | 20 |
| VCC Short Circuit Protection | VVCC_SCP | | 1.1 | 1.9 | V | | 20 |
| Internal Reference Voltage | VREF | 3.2 | 3.3 | 3.39 | V | Measured at pin FB IFB=0 | 21 |
| Feedback Pull-Up Resistor | RFB | 11 | 15 | 20 | kΩ | | 21 |
| PWM-OP Gain | GPWM | 1.95 | 2.05 | 2.15 | - | | 21 |
| Offset for Voltage Ramp | VPWM | 0.42 | 0.5 | 0.58 | V | | 21 |
| Maximum on time in normal operation | tOnMax | 20 | 35 | 60 | µs | | 21 |
| Maximum off time in normal operation | tOffMax | 24 | 42.5 | 71 | µs | | 21 |
| Peak current limitation in normal operation | VCS_N | 0.94 | 1 | 1.06 | V | | 21 |
| Leading Edge Blanking time | tCS_LEB | 118 | 220 | 462 | ns | | 21 |
| Peak Current Limitation in Active Burst Mode, Level 1 | VCS_BL1 | 0.26 | 0.31 | 0.36 | V | | 21 |
| Peak Current Limitation in Active Burst Mode, Level 2 | VCS_BL2 | 0.3 | 0.35 | 0.4 | V | | 21 |
| Abnormal CS voltage threshold | VCS_STG | 0.06 | 0.1 | 0.15 | V | | 21 |
| Abnormal CS voltage Sample period | tCS_STG_SAM | 2.3 | 5 | | µs | | 21 |
| Soft-Start time | tSS | 8.5 | 12 | | ms | | 22 |
| Zero crossing threshold voltage | VZCD_CT | 60 | 100 | 150 | mV | | 22 |
| Minimum ringing suppression time | tZCD_RS1 | 1.5 | 2.5 | 4.1 | µs | VZCD > VZCD,RS | 22 |
| ZCD resistance | RZCD | 2.5 | 3 | 3.5 | kΩ | Internal resistor at ZCD pin | 22 |
| VIN voltage threshold for line selection | VVIN_REF | 1.48 | 1.52 | 1.58 | V | | 22 |
| Charging current to select burst mode | Isel | 2.1 | 3 | 3.9 | µA | | 23 |
| Burst mode selection reference voltage | VREF_B | 2.65 | 2.75 | 2.85 | V | | 23 |
| Feedback voltage for entering Active Burst Mode for level 1 | VFB_EBL1 | 0.86 | 0.9 | 0.94 | V | | 23 |
| Feedback voltage for entering Active Burst Mode for level 2 | VFB_EBL2 | 1 | 1.05 | 1.1 | V | | 23 |
| Feedback voltage for leaving Active Burst Mode | VFB_LB | 2.65 | 2.75 | 2.85 | V | | 23 |
| Feedback voltage for burst-on | VFB_BOn | 2.3 | 2.4 | 2.5 | V | | 23 |
| Feedback voltage for burst-off | VFB_BOff | 1.9 | 2 | 2.1 | V | | 23 |
| Line Over Voltage threshold | VVIN_LOVP | 2.8 | 2.9 | 3 | V | | 23 |
| BrownIn threshold | VVIN_BI | 0.63 | 0.66 | 0.69 | V | | 23 |
| BrownOut threshold | VVIN_BO | 0.37 | 0.4 | 0.43 | V | | 23 |
| VCC Over Voltage threshold | VVCC_OVP | 24 | 25.5 | 27 | V | | 24 |
| Over Load Detection threshold for OLP protection at FB pin | VFB_OLP | 2.65 | 2.75 | 2.85 | V | | 24 |
| Output Over Voltage threshold | VZCD_OVP | 1.9 | 2 | 2.1 | V | | 24 |
| Over temperature protection | Tjcon_OTP | 129 | 140 | 150 | °C | Junction temperature of the controller chip (not the CoolMOS chip) | 24 |
| Drain Source Breakdown Voltage ICE5QRxx70Ax | V(BR)DSS | 700 | | | V | Tj = 25°C | 25 |
| Drain to CS On-Resistance (inclusive of low side MOSFET), ICE5QR2270AZ | RDSon | | 2.13 | 2.33 | Ω | Tj = 25°C, ID =1A | 25 |
| Drain to CS On-Resistance (inclusive of low side MOSFET), ICE5QR2270AZ at high temperature | RDSon | | 4.31 | | Ω | Tj=125°C1, ID =1A | 25 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | minimum drain pin copper area in a 2 oz copper single sided PCB. The output power figure is for selection purpose only. The actual | 2 |
## CAD (KiCad official)
- Symbol: `ICE5QR2270AZ`
- Footprint: `Package_DIP:DIP-8-N6_W7.62mm`
- 3D model: DIP-7 (KiCad packages3D, STEP)
- 3D model files: `ice5qr2270az-etched.step` / `ice5qr2270az-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ice5qr2270az.step` / `ice5qr2270az.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](docs/ice5qr2270az-datasheet.pdf) (54 pp, sha256 `84ae0622caa91ac4`, retrieved 2026-10-30, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ice5qr2270az-datasheet.pdf)