component
ICE5BR2280BZXKLA1
Public Made by Adomby adom
Infineon Technologies AC-DC Controllers And Regulators, DIP-7. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ICE5BR2280BZXKLA1
Infineon Technologies · AC-DC Controllers And Regulators · DIP-7
ICE5BR2280BZXKLA1 from Infineon Technologies, in a DIP-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VERR | input | Error amplifier input for a non-isolated converter (BZ version); connect this pin to GND for an isolated converter. |
| 2 | FB | input | Combines feedback control, selectable burst entry/exit control and overload/open loop protection. |
| 3 | CS | input | Connected to the external shunt resistor for primary current sensing and internally to the PWM signal generator for switch-off determination together with the feedback voltage. |
| 4 | GATE | output | Gate driver output to the internal CoolMOS gate; a pull-up resistor from the bus voltage turns on the CoolMOS to charge the VCC capacitor during startup. |
| 5 | DRAIN | passive | Drain of the integrated CoolMOS, connected to the drain of the integrated CoolMOS. |
| 7 | VCC | power_in | Positive voltage supply to the IC; the operating range is between VVCC_OFF and VVCC_OVP. |
| 8 | GND | power_in | Common ground of the controller. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | DIP-7 |
| Category | Power Management (PMIC) |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain voltage | VDRAIN | 800 | V | Tj = 25°C; ICE5xRxx80xZ | 20 | ||
| Pulse drain current | ID,Pulse | 5.82 | A | Pulse width tP limited by Tj,max. | 20 | ||
| Avalanche energy, repetitive | EAR | 0.05 | mJ | ID = 0.40 A, VDD = 50 V; tAR limited by Tj=150°C, Tj,Start=25°C | 20 | ||
| Avalanche current, repetitive | IAR | 0.4 | A | tAR limited by Tj=150°C, Tj,Start=25°C | 20 | ||
| VCC supply voltage | VCC | -0.3 | 27 | V | 20 | ||
| GATE voltage | VGATE | -0.3 | 27 | V | 20 | ||
| FB voltage | VFB | -0.3 | 3.6 | V | 20 | ||
| VERR voltage | VERR | -0.3 | 3.6 | V | 20 | ||
| CS voltage | VCS | -0.3 | 3.6 | V | 20 | ||
| VIN voltage | VVIN | -0.3 | 3.6 | V | 20 | ||
| Maximum DC current on any pin | -10 | 10 | mA | Except DRAIN and CS pin. | 20 | ||
| ESD robustness HBM | VESD_HBM | 2000 | V | According to EIA/JESD22. | 21 | ||
| Junction temperature range | Tj | -40 | 150 | °C | Controller and CoolMOS™. | 21 | |
| Storage temperature | TSTORE | -55 | 150 | °C | 21 | ||
| Thermal resistance (junction-ambient) | RthJA | 104 | K/W | JEDEC JESD51; minimum drain pin copper area in 2 oz copper single-sided PCB | 21 | ||
| Junction temperature of controller | TjCon_op | -40 | °C | Maximum value limited due to OTP of controller chip. | 21 | ||
| Junction temperature of CoolMOS | TjCoolMOS_op | -40 | 150 | °C | 21 | ||
| VCC charge current step 1 | IVCC_Charge1 | -0.35 | -0.2 | -0.09 | mA | VVCC = 0 V, RStartUp = 50 MΩ and VDRAIN = 90 V | 21 |
| VCC charge current step 3 | IVCC_Charge3 | -5 | -3 | -1 | mA | VVCC = 15 V, RStartUp = 50 MΩ and VDRAIN = 90 V | 21 |
| VCC turn-on threshold voltage | VVCC_ON | 15.3 | 16 | 16.5 | V | 22 | |
| VCC turn-off threshold voltage | VVCC_OFF | 9.4 | 10 | 10.4 | V | 22 | |
| VCC short circuit protection | VVCC_SCP | 1.1 | 1.9 | V | 22 | ||
| Internal reference voltage | VREF | 3.2 | 3.3 | 3.39 | V | Measured at FB pin IFB = 0 A | 22 |
| Fixed oscillator frequency 65 kHz | fOSC2 | 61.1 | 65 | 68.9 | kHz | Tj = 25°C | 22 |
| Fixed oscillator frequency 65 kHz (ABM) | fOSC2_ABM | 46.2 | 54 | 61.1 | kHz | Tj = 25°C | 22 |
| Fixed oscillator frequency 65 kHz (minimum Fsw) | fOSC2_MIN | 23.4 | 28 | 33.2 | kHz | Tj = 25°C | 22 |
| Frequency jittering range | FJITTER | -4 | 4 | % | Tj = 25°C | 23 | |
| Maximum duty cycle | DMAX | 70 | 75 | 80 | % | 23 | |
| Feedback pull-up resistor | RFB | 11 | 15 | 20 | kΩ | 23 | |
| Offset for voltage ramp | VPWM | 0.42 | 0.5 | 0.58 | V | 23 | |
| Slope compensation rate 65 kHz | MCOMP | 26.5 | 32.5 | 38 | mV/μs | Vcs = 0 V | 23 |
| Transconductance | GERR_M | 2.14 | 2.8 | 3.44 | mA/V | 23 | |
| Transconductance, Burst mode | GERR_BM | 6.9 | 9.2 | 11.6 | mA/V | 23 | |
| Error amplifier source current | IERR_SOURCE | 85 | 150 | 223 | μA | 23 | |
| Error amplifier sink current | IERR_SINK | 85 | 150 | 223 | μA | 23 | |
| Error amplifier reference voltage | VERR_REF | 1.76 | 1.8 | 1.84 | V | 23 | |
| Error amplifier output dynamic range of transconductance | VERR_DYN | 0.05 | 3.15 | V | 23 | ||
| Peak current limitation in normal operation | VCS_N | 0.72 | 0.8 | 0.88 | V | dVsense/dt = 0.41 V/μs | 23 |
| Peak current limitation in normal operation, 15% of TON | VCS_N15 | 0.74 | 0.79 | 0.84 | V | 23 | |
| Leading edge-blanking time | tCS_LEB | 70 | 220 | 365 | ns | 23 | |
| Peak current limitation in ABM, high power | VCS_BHP | 0.23 | 0.27 | 0.31 | V | 23 | |
| Peak current limitation in ABM, low power | VCS_BLP | 0.18 | 0.22 | 0.26 | V | 24 | |
| Abnormal CS voltage threshold | VCS_STG | 0.06 | 0.1 | 0.15 | V | 24 | |
| Soft start time | tSS | 7.3 | 12 | ms | 24 | ||
| Charging current to select burst mode | Isel | 2.5 | 3 | 3.5 | µA | 24 | |
| Burst mode selection reference voltage threshold 1 | VFB_P_BIAS1 | 1.65 | 1.73 | 1.8 | V | 24 | |
| Burst mode selection reference voltage threshold 2 | VFB_P_BIAS2 | 2.76 | 2.89 | 3.01 | V | 24 | |
| Feedback voltage for entering ABM for high power | VFB_EBHP | 0.98 | 1.03 | 1.08 | V | 24 | |
| Feedback voltage for entering ABM for low power | VFB_EBLP | 0.88 | 0.93 | 0.98 | V | 24 | |
| Feedback voltage for leaving ABM | VFB_LB | 2.63 | 2.73 | 2.83 | V | 24 | |
| Feedback voltage for burst-on, isolated case | VFB_Bon_ISO | 2.26 | 2.35 | 2.45 | V | 24 | |
| Feedback voltage for burst-off, isolated case | VFB_BOff_ISO | 1.88 | 2 | 2.05 | V | 24 | |
| Feedback voltage for burst-on, non-isolated case | VFB_Bon_NISO | 1.88 | 1.95 | 2.05 | V | 25 | |
| Feedback voltage for burst-off, non-isolated case | VFB_BOff_NISO | 1.5 | 1.55 | 1.64 | V | 25 | |
| Overload detection threshold for OLP protection at FB pin | VFB_OLP | 2.63 | 2.73 | 2.83 | V | 25 | |
| Overload protection blanking time | tFB_OLP_B | 30 | 54 | ms | 25 | ||
| Overtemperature protection | Tjcon_OTP | 129 | 140 | 150 | °C | Junction temperature of the controller chip (not the CoolMOS chip). | 25 |
| Drain source breakdown voltage | V(BR)DSS | 800 | V | Tj = 25°C; ICE5xRxx80xZ | 26 | ||
| Drain source on-resistance at 25°C | RDSon | 2.13 | 2.35 | Ω | Tj = 25°C | 26 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | minimum drain pin copper area in a 2 oz copper single-sided PCB. The output power figure is for selection purpose only. The actual | 3 |
CAD (KiCad official)
- Symbol:
ICE5BR2280BZXKLA1 - Footprint:
Package_DIP:DIP-8-N6_W7.62mm - 3D model: DIP-7 (KiCad packages3D, STEP)
- 3D model files:
ice5br2280bzxkla1-etched.step/ice5br2280bzxkla1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ice5br2280bzxkla1.step/ice5br2280bzxkla1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (40 pp, sha256
2fcad70c6f240373, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ICE5BR2280BZXKLA1
**Infineon Technologies** · AC-DC Controllers And Regulators · DIP-7
ICE5BR2280BZXKLA1 from Infineon Technologies, in a DIP-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VERR | input | Error amplifier input for a non-isolated converter (BZ version); connect this pin to GND for an isolated converter. |
| 2 | FB | input | Combines feedback control, selectable burst entry/exit control and overload/open loop protection. |
| 3 | CS | input | Connected to the external shunt resistor for primary current sensing and internally to the PWM signal generator for switch-off determination together with the feedback voltage. |
| 4 | GATE | output | Gate driver output to the internal CoolMOS gate; a pull-up resistor from the bus voltage turns on the CoolMOS to charge the VCC capacitor during startup. |
| 5 | DRAIN | passive | Drain of the integrated CoolMOS, connected to the drain of the integrated CoolMOS. |
| 7 | VCC | power_in | Positive voltage supply to the IC; the operating range is between VVCC_OFF and VVCC_OVP. |
| 8 | GND | power_in | Common ground of the controller. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | DIP-7 |
| Category | Power Management (PMIC) |
| Pins | 7 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain voltage | VDRAIN | 800 | | | V | Tj = 25°C; ICE5xRxx80xZ | 20 |
| Pulse drain current | ID,Pulse | | | 5.82 | A | Pulse width tP limited by Tj,max. | 20 |
| Avalanche energy, repetitive | EAR | | | 0.05 | mJ | ID = 0.40 A, VDD = 50 V; tAR limited by Tj=150°C, Tj,Start=25°C | 20 |
| Avalanche current, repetitive | IAR | | | 0.4 | A | tAR limited by Tj=150°C, Tj,Start=25°C | 20 |
| VCC supply voltage | VCC | -0.3 | | 27 | V | | 20 |
| GATE voltage | VGATE | -0.3 | | 27 | V | | 20 |
| FB voltage | VFB | -0.3 | | 3.6 | V | | 20 |
| VERR voltage | VERR | -0.3 | | 3.6 | V | | 20 |
| CS voltage | VCS | -0.3 | | 3.6 | V | | 20 |
| VIN voltage | VVIN | -0.3 | | 3.6 | V | | 20 |
| Maximum DC current on any pin | | -10 | | 10 | mA | Except DRAIN and CS pin. | 20 |
| ESD robustness HBM | VESD_HBM | | | 2000 | V | According to EIA/JESD22. | 21 |
| Junction temperature range | Tj | -40 | | 150 | °C | Controller and CoolMOS™. | 21 |
| Storage temperature | TSTORE | -55 | | 150 | °C | | 21 |
| Thermal resistance (junction-ambient) | RthJA | | | 104 | K/W | JEDEC JESD51; minimum drain pin copper area in 2 oz copper single-sided PCB | 21 |
| Junction temperature of controller | TjCon_op | -40 | | | °C | Maximum value limited due to OTP of controller chip. | 21 |
| Junction temperature of CoolMOS | TjCoolMOS_op | -40 | | 150 | °C | | 21 |
| VCC charge current step 1 | IVCC_Charge1 | -0.35 | -0.2 | -0.09 | mA | VVCC = 0 V, RStartUp = 50 MΩ and VDRAIN = 90 V | 21 |
| VCC charge current step 3 | IVCC_Charge3 | -5 | -3 | -1 | mA | VVCC = 15 V, RStartUp = 50 MΩ and VDRAIN = 90 V | 21 |
| VCC turn-on threshold voltage | VVCC_ON | 15.3 | 16 | 16.5 | V | | 22 |
| VCC turn-off threshold voltage | VVCC_OFF | 9.4 | 10 | 10.4 | V | | 22 |
| VCC short circuit protection | VVCC_SCP | | 1.1 | 1.9 | V | | 22 |
| Internal reference voltage | VREF | 3.2 | 3.3 | 3.39 | V | Measured at FB pin IFB = 0 A | 22 |
| Fixed oscillator frequency 65 kHz | fOSC2 | 61.1 | 65 | 68.9 | kHz | Tj = 25°C | 22 |
| Fixed oscillator frequency 65 kHz (ABM) | fOSC2_ABM | 46.2 | 54 | 61.1 | kHz | Tj = 25°C | 22 |
| Fixed oscillator frequency 65 kHz (minimum Fsw) | fOSC2_MIN | 23.4 | 28 | 33.2 | kHz | Tj = 25°C | 22 |
| Frequency jittering range | FJITTER | -4 | | 4 | % | Tj = 25°C | 23 |
| Maximum duty cycle | DMAX | 70 | 75 | 80 | % | | 23 |
| Feedback pull-up resistor | RFB | 11 | 15 | 20 | kΩ | | 23 |
| Offset for voltage ramp | VPWM | 0.42 | 0.5 | 0.58 | V | | 23 |
| Slope compensation rate 65 kHz | MCOMP | 26.5 | 32.5 | 38 | mV/μs | Vcs = 0 V | 23 |
| Transconductance | GERR_M | 2.14 | 2.8 | 3.44 | mA/V | | 23 |
| Transconductance, Burst mode | GERR_BM | 6.9 | 9.2 | 11.6 | mA/V | | 23 |
| Error amplifier source current | IERR_SOURCE | 85 | 150 | 223 | μA | | 23 |
| Error amplifier sink current | IERR_SINK | 85 | 150 | 223 | μA | | 23 |
| Error amplifier reference voltage | VERR_REF | 1.76 | 1.8 | 1.84 | V | | 23 |
| Error amplifier output dynamic range of transconductance | VERR_DYN | 0.05 | | 3.15 | V | | 23 |
| Peak current limitation in normal operation | VCS_N | 0.72 | 0.8 | 0.88 | V | dVsense/dt = 0.41 V/μs | 23 |
| Peak current limitation in normal operation, 15% of TON | VCS_N15 | 0.74 | 0.79 | 0.84 | V | | 23 |
| Leading edge-blanking time | tCS_LEB | 70 | 220 | 365 | ns | | 23 |
| Peak current limitation in ABM, high power | VCS_BHP | 0.23 | 0.27 | 0.31 | V | | 23 |
| Peak current limitation in ABM, low power | VCS_BLP | 0.18 | 0.22 | 0.26 | V | | 24 |
| Abnormal CS voltage threshold | VCS_STG | 0.06 | 0.1 | 0.15 | V | | 24 |
| Soft start time | tSS | 7.3 | 12 | | ms | | 24 |
| Charging current to select burst mode | Isel | 2.5 | 3 | 3.5 | µA | | 24 |
| Burst mode selection reference voltage threshold 1 | VFB_P_BIAS1 | 1.65 | 1.73 | 1.8 | V | | 24 |
| Burst mode selection reference voltage threshold 2 | VFB_P_BIAS2 | 2.76 | 2.89 | 3.01 | V | | 24 |
| Feedback voltage for entering ABM for high power | VFB_EBHP | 0.98 | 1.03 | 1.08 | V | | 24 |
| Feedback voltage for entering ABM for low power | VFB_EBLP | 0.88 | 0.93 | 0.98 | V | | 24 |
| Feedback voltage for leaving ABM | VFB_LB | 2.63 | 2.73 | 2.83 | V | | 24 |
| Feedback voltage for burst-on, isolated case | VFB_Bon_ISO | 2.26 | 2.35 | 2.45 | V | | 24 |
| Feedback voltage for burst-off, isolated case | VFB_BOff_ISO | 1.88 | 2 | 2.05 | V | | 24 |
| Feedback voltage for burst-on, non-isolated case | VFB_Bon_NISO | 1.88 | 1.95 | 2.05 | V | | 25 |
| Feedback voltage for burst-off, non-isolated case | VFB_BOff_NISO | 1.5 | 1.55 | 1.64 | V | | 25 |
| Overload detection threshold for OLP protection at FB pin | VFB_OLP | 2.63 | 2.73 | 2.83 | V | | 25 |
| Overload protection blanking time | tFB_OLP_B | 30 | 54 | | ms | | 25 |
| Overtemperature protection | Tjcon_OTP | 129 | 140 | 150 | °C | Junction temperature of the controller chip (not the CoolMOS chip). | 25 |
| Drain source breakdown voltage | V(BR)DSS | 800 | | | V | Tj = 25°C; ICE5xRxx80xZ | 26 |
| Drain source on-resistance at 25°C | RDSon | | 2.13 | 2.35 | Ω | Tj = 25°C | 26 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | minimum drain pin copper area in a 2 oz copper single-sided PCB. The output power figure is for selection purpose only. The actual | 3 |
## CAD (KiCad official)
- Symbol: `ICE5BR2280BZXKLA1`
- Footprint: `Package_DIP:DIP-8-N6_W7.62mm`
- 3D model: DIP-7 (KiCad packages3D, STEP)
- 3D model files: `ice5br2280bzxkla1-etched.step` / `ice5br2280bzxkla1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ice5br2280bzxkla1.step` / `ice5br2280bzxkla1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](docs/ice5br2280bzxkla1-datasheet.pdf) (40 pp, sha256 `2fcad70c6f240373`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ice5br2280bzxkla1-datasheet.pdf)