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ICE3BS03LJGXUMA1

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Infineon Technologies AC-DC Controllers & Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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ICE3BS03LJGXUMA1

Infineon Technologies · AC-DC Controllers & Regulators · SOIC-8

ICE3BS03LJGXUMA1 from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BL input Extendable blanking time (external capacitor to ground extends the built-in 20ms blanking time) and external latch off enable, triggered by pulling BL below 0.25V.
2 FB input Feedback input providing regulation information to the internal protection unit and PWM comparator to control duty cycle; the only control signal in Active Burst Mode at light load.
3 CS input Current sense input sensing the voltage across the series resistor in the power MOSFET source; the driver output switches off immediately when CS reaches the current limit comparator threshold.
4 Gate output Output of the internal driver stage connected to the gate of an external power MOSFET.
5 HV input High voltage input connected to the rectified DC input voltage, feeding the integrated 500V startup cell.
6 n.c. unconnected Not connected.
7 VCC power_in Positive supply of the IC with an operating range between 10.5V and 26V.
8 GND power_in Ground of the controller.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
HV Voltage VHV 500 V 18
VCC Supply Voltage VVCC -0.3 27 V 18
FB Voltage VFB -0.3 5 V 18
CS Voltage VCS -0.3 5 V 18
Junction Temperature Tj -40 150 °C 18
Storage Temperature TS -55 150 °C 18
Thermal Resistance Junction-Ambient RthJA 185 K/W 18
ESD Capability (incl. Drain Pin) VESD 2 kV Human body model 18
VCC Supply Voltage (operating) VVCC 26 V min is VVCCoff 18
Junction Temperature of Controller TjCon -25 130 °C Max value limited due to thermal shut down of controller 18
Start Up Current IVCCstart 150 250 µA VVCC =16.5V 19
VCC Charge Current IVCCcharge1 5 mA VVCC = 0V 19
VCC Charge Current IVCCcharge2 0.55 0.9 1.6 mA VVCC = 1V 19
VCC Charge Current IVCCcharge3 0.7 mA VVCC =16.5V 19
Leakage Current of Start Up Cell IStartLeak 0.2 50 µA VHV = 450V, VVCC=18V 19
Supply Current with Inactive Gate IVCCsup1 1.5 2.5 mA 19
Supply Current with Active Gate IVCCsup2 2.5 4.2 mA IFB = 0A, CLoad=1nF 19
Supply Current in Latched Off Mode IVCClatch 250 µA IFB = 0A 19
Supply Current in Auto Restart Mode with Inactive Gate IVCCrestart 250 µA IFB = 0A 19
Supply Current in Active Burst Mode with Inactive Gate IVCCburst1 450 950 µA VFB = 2.5V 19
VCC Turn-On Threshold VVCCon 17 18 19 V 19
VCC Turn-Off Threshold VVCCoff 9.8 10.5 11.2 V 19
VCC Turn-On/Off Hysteresis VVCChys 7.5 V 19
Trimmed Reference Voltage VREF 4.9 5 5.1 V measured at pin FB, IFB = 0 19
Fixed Oscillator Frequency fOSC1 56.5 65 73.7 kHz 20
Fixed Oscillator Frequency fOSC2 59.8 65 70.2 kHz Tj = 25°C 20
Frequency Jittering Range fjitter 2.6 kHz Tj = 25°C; printed as ±2.6 20
Max. Duty Cycle Dmax 0.7 0.75 0.8 20
Min. Duty Cycle Dmin 0 VFB < 0.3V 20
PWM-OP Gain AV 3 3.2 3.4 20
Voltage Ramp Offset VOffset-Ramp 0.6 V 20
VFB Operating Range Min Level VFBmin 0.5 V 20
VFB Operating Range Max level VFBmax 4.3 V CS=1V, limited by Comparator C4 20
FB Pull-Up Resistor RFB 9 15.4 22 kΩ 20
Soft Start time tSS 20 ms 20
Clamped VBL voltage during Normal Operating Mode VBLclmp 0.85 0.9 0.95 V VFB = 4V 21
Blanking time voltage limit for Comparator C3 VBKC3 3.85 4 4.15 V 21
Over Load & Open Loop Detection Limit for Comparator C4 VFBC4 3.85 4 4.15 V 21
Active Burst Mode Level for Comparator C5 VFBC5 1.12 1.23 1.34 V 21
Active Burst Mode Level for Comparator C6a VFBC6a 3.35 3.5 3.65 V After Active Burst Mode is entered 21
Active Burst Mode Level for Comparator C6b VFBC6b 2.88 3 3.12 V After Active Burst Mode is entered 21
Overvoltage Detection Limit VVCCOVP 24.5 25.5 26.5 V 21
Latch Enable level at BL pin VLE 0.17 0.25 0.33 V > 30µs 21
Charging current at BL pin IBK 9.1 13 16.9 µA Charge starts after the built-in 20ms blanking time elapsed 21
Latched Thermal Shutdown TjSD 130 140 150 °C 21
Built-in Blanking Time for Overload Protection or enter Active Burst Mode tBK 20 ms without external capacitor at BL pin 21
Inhibit Time for Latch Enable function during Start up tIHLE 1 ms After IC turns on 21
Spike Blanking Time before Latch off or Auto Restart Protection tSpike 30 µs 21
Power Down Reset for Latched Mode VVCCPD 5.2 6.23 7.8 V After Latched Off Mode is entered 21
Peak Current Limitation (incl. Propagation Delay) Vcsth 0.99 1.06 1.13 V dVsense / dt = 0.6V/µs (see Figure 20) 22
Peak Current Limitation during Active Burst Mode VCS2 0.21 0.25 0.31 V 22
Leading Edge Blanking tLEB 220 ns 22
CS Input Bias Current ICSbias -1.5 -0.2 µA VCS =0V 22
Over Current Detection for Latched Off Mode VCS1 1.57 1.66 1.76 V 22
CS Spike Blanking for Comparator C11 tCSspike 190 ns 22
GATE Low Voltage VGATElow 1.2 V VVCC = 5 V, IGate = 1 mA 22
GATE Low Voltage VGATElow 1.5 V VVCC = 5 V, IGate = 5 mA 22
GATE Low Voltage VGATElow 0.8 V IGate = 0 A 22
GATE Low Voltage VGATElow 1.6 2 V IGate = 20 mA 22
GATE Low Voltage VGATElow -0.2 0.2 V IGate = -20 mA 22
GATE High Voltage VGATEhigh 10 V VVCC = 26V, CL = 680pF 22
GATE High Voltage VGATEhigh 9 V VVCC = 15V, CL = 680pF 22
GATE High Voltage VGATEhigh 8 V VVCC = VVCCoff + 0.2V, CL = 680pF 22
GATE Rise Time (incl. Gate Rising Slope) trise 150 ns VGate = 2V ...9V, CL = 680pF 22
GATE Fall Time tfall 55 ns VGate = 9V ...2V, CL = 680pF 22
GATE Current, Peak, Rising Edge IGATE -0.17 A CL = 680pF 22
GATE Current, Peak, Falling Edge IGATE 0.39 A CL = 680pF 22

CAD (KiCad official)

  • Symbol: ICE3BS03LJGXUMA1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ice3bs03ljgxuma1-etched.step / ice3bs03ljgxuma1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ice3bs03ljgxuma1.step / ice3bs03ljgxuma1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (25 pp, sha256 846e19072319c1e9, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF