Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

ICE3AR2280VJZ

Infineon Technologies · AC-DC Controllers & Regulators · DIP-7

ICE3AR2280VJZ from Infineon Technologies, in a DIP-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BV input The BV pin combines input OVP, which stops the switching pulse when the input line voltage is higher than VOVP_ref after the resistor divider, with an extendable blanking time that adds to the built-in 20 ms blanking time via an external capacitor to ground.
2 FBB input The FBB pin provides the regulation feedback to the protection unit and PWM comparator and is the only control signal at light load in Active Burst Mode, with burst entry/exit level selection.
3 CS input The CS pin senses the voltage across the shunt resistor in the CoolMOS source, and when it reaches the current limit comparator threshold the driver output is immediately switched off.
4 n.c. unconnected This pin is not connected.
5 Drain passive Pin Drain is the connection to the Drain of the integrated 800V CoolMOS.
7 VCC power_in The VCC pin is the positive supply of the IC with an operating range between 10.5V and 25V.
8 GND power_in The GND pin is the ground of the controller.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package DIP-7
Category Power Management ICs
Pins 7

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain Source Voltage VDS 800 V 30
Pulse drain current ID_Puls 4.9 A tp limited by Tjmax 30
Avalanche energy, repetitive EAR 0.047 mJ tAR limited by max. Tj=150°C 30
Avalanche current, repetitive IAR 1.5 A tAR limited by max. Tj=150°C 30
VCC Supply Voltage VVCC -0.3 27 V 30
FBB Voltage VFBB -0.3 5.5 V 30
BV Voltage VBV -0.3 5.5 V 30
CS Voltage VCS -0.3 5.5 V 30
Junction Temperature Tj -40 150 °C Controller & CoolMOS 30
Storage Temperature TS -55 150 °C 30
Thermal Resistance Junction-Ambient RthJA 96 K/W 30
Soldering temperature, wavesoldering Tsold 260 °C 1.6mm from case for 10s 30
ESD Capability (incl. Drain Pin) VESD 2 kV Human body model 30
VCC Supply Voltage operating range VVCC 25 V Max value limited due to Vcc OVP 31
Junction Temperature of Controller TjCon -40 130 °C Max value limited due to thermal shut down of controller 31
Junction Temperature of CoolMOS TjCoolMOS -40 150 °C 31
Start Up Current IVCCstart 200 300 µA VVCC =16V 31
VCC Charge Current IVCCcharge1 5 mA VVCC = 0V 31
VCC Charge Current IVCCcharge2 0.55 0.9 1.6 mA VVCC = 1V 31
VCC Charge Current IVCCcharge3 0.38 0.7 mA VVCC =16V 31
Leakage Current of Start Up Cell and CoolMOS IStartLeak 0.2 50 µA VDrain= 650V at Tj=100°C 31
Supply Current with Inactive Gate IVCCsup1 1.9 3.2 mA 31
Supply Current with Active Gate IVCCsup2 3.4 4.8 mA IFBB = 0A 31
Supply Current in Active Burst Mode with Inactive Gate IVCCburst1 620 950 µA VFBB = 2.5V 31
VCC Turn-On Threshold VVCCon 16 17 18 V 31
VCC Turn-Off Threshold VVCCoff 9.8 10.5 11.2 V 31
Trimmed Reference Voltage VREF 4.9 5 5.1 V measured at pin FBB IFBB = 0 32
Fixed Oscillator Frequency fOSC1 87 100 113 kHz 32
Fixed Oscillator Frequency fOSC2 90 100 108 kHz Tj = 25°C 32
Max. Duty Cycle Dmax 0.7 0.75 0.8 32
Min. Duty Cycle Dmin 0 VFBB < 0.3V 32
PWM-OP Gain AV 3.05 3.25 3.45 32
VFBB Operating Range Max level VFBmax 4.3 V CS=1V, limited by Comparator C4 32
FBB Pull-Up Resistor RFB 9 15.4 23 kΩ 32
Input OVP reference voltage for comparator C14a VOVP_ref 1.9 1.98 2.06 V Tj = 25°C 33
Blanking time voltage lower limit for Comparator C3 VBKC3 0.8 0.9 1 V 33
Blanking time voltage upper limit for Comparator C11 VBKC11 4.28 4.5 4.72 V 33
Over Load Limit for Comparator C4 VFBC4 4.28 4.5 4.72 V 33
Entry Burst select High level for Comparator C19 VFBC19 4.28 4.5 4.72 V 33
Entry Burst select Low level for Comparator C20 VFBC20 0.4 0.5 0.6 V 33
Active Burst Mode Entry Level for Comparator C5 (10% Pin_max) VFB_burst1 1.51 1.6 1.69 V < 7 counts 33
Active Burst Mode Entry Level for Comparator C5 (6.67% Pin_max) VFB_burst2 1.34 1.42 1.5 V 8 ~ 39 counts 33
Active Burst Mode Entry Level for Comparator C5 (4.38% Pin_max) VFB_burst3 1.2 1.27 1.34 V 40 ~ 191 counts 33
Active Burst Mode High Level for Comparator C6a VFBC6a 3.35 3.5 3.65 V In Active Burst Mode 33
Active Burst Mode Low Level for Comparator C6b VFBC6b 3.06 3.2 3.34 V 33
Active Burst Mode Level for Comparator C13 VFBC13 3.85 4 4.15 V 33
Overvoltage Detection Limit for Comparator C1 VVCCOVP1 19.5 20.5 21.5 V VFBB = 5V, during soft start 33
Overvoltage Detection Limit for Comparator C2 VVCCOVP2 25 25.5 26.3 V 33
Charging current for extended blanking time Ichg_EB 460 720 864 µA 33
Thermal Shutdown TjSD 130 140 150 °C Controller 33
Peak Current Limitation (incl. Propagation Delay) Vcsth 0.98 1.06 1.13 V dVsense / dt = 0.6V/µs (Figure 21) 34
Peak Current Limitation during Active Burst Mode (20% Pin_max) Vcsth_burst1 0.37 0.45 0.51 V < 7 counts 34
Peak Current Limitation during Active Burst Mode (13.3% Pin_max) Vcsth_burst2 0.3 0.37 0.44 V 8 ~ 39 counts 34
Peak Current Limitation during Active Burst Mode (9.6% Pin_max) Vcsth_burst3 0.23 0.31 0.37 V 40 ~ 191 counts 34
CS Input Bias Current ICSbias -1.5 -0.2 µA VCS =0V 34
Drain Source Breakdown Voltage V(BR)DSS 800 V Tj = 25°C 34
Drain Source Breakdown Voltage V(BR)DSS 870 V Tj = 110°C 34
Drain Source On-Resistance RDSon 2.26 2.62 Ω Tj = 25°C at ID = 0.81A 34
Drain Source On-Resistance RDSon 5.02 5.81 Ω Tj=125°C at ID = 0.81A 34

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing pet ESD Capability (incl. Drain Pin) VESD - 2 kV Human body model2) 1) Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f 30

CAD (KiCad official)

  • Symbol: ICE3AR2280VJZ
  • Footprint: Package_DIP:DIP-8-N6_W7.62mm
  • 3D model: DIP-7 (KiCad packages3D, STEP)
  • 3D model files: ice3ar2280vjz-etched.step / ice3ar2280vjz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ice3ar2280vjz.step / ice3ar2280vjz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (43 pp, sha256 37ef08c559122bf5, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF