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IAUC26N10S5L245

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Leiditech MOSFETs, DFN-8(5x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IAUC26N10S5L245

Leiditech · MOSFETs · DFN-8(5x6)

IAUC26N10S5L245 from Leiditech, in a DFN-8(5x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal; pin 1 is marked by the dot, and the source is the low-side power terminal (VDS max 100 V).
2 S passive Source terminal, shared with pins 1 and 3 for the continuous drain current rating of 40 A.
3 S passive Source terminal, shared with pins 1 and 2 for the continuous drain current rating of 40 A.
4 G input Gate terminal with a gate-source voltage limit of ±20 V and a threshold of 1.0 to 2.5 V.
5 D passive Drain terminal, connected to pins 6, 7 and 8; VDS max 100 V and pulsed drain current 120 A.
6 D passive Drain terminal, connected to pins 5, 7 and 8; VDS max 100 V and pulsed drain current 120 A.
7 D passive Drain terminal, connected to pins 5, 6 and 8; VDS max 100 V and pulsed drain current 120 A.
8 D passive Drain terminal, connected to pins 5, 6 and 7; VDS max 100 V and pulsed drain current 120 A.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Leiditech
Package DFN-8(5x6)
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage BVDSS 100 V VGS=0 V, ID=250 μA 2
Gate threshold voltage VGS(th) 1 2.5 V VDS=VGS, ID=250 μA 2
Drain-source on-state resistance RDS(ON) 16 20 mΩ VGS=10 V, ID=8 A 2
Drain-source on-state resistance RDS(ON) 26 mΩ VGS=4.5 V, ID=6 A 2
Gate-source leakage current IGSS -100 100 nA VGS=20 V 2
Drain-source leakage current IDSS 1 μA VDS=100 V, VGS=0 V 2
Diode forward voltage VSD 1.3 V IS=8 A, VGS=0 V 2
Diode forward current IS 40 A VGS<Vth 2
Pulsed source current ISP 120 A 2
Drain source voltage VDS 100 V Tj=25℃ 1
Gate source voltage VGS -20 20 V Tj=25℃ 1
Continuous drain current ID 40 A TC=25 ℃ 1
Pulsed drain current ID, pulse 120 A TC=25 ℃ 1
Power dissipation PD 72 W TC=25 ℃ 1
Single pulsed avalanche energy EAS 30 mJ VDD=50 V, RG=25 Ω, L=0.3 mH, starting Tj=25 ℃ 1
Operation and storage temperature Tstg, Tj -55 150 ℃ 1
Thermal resistance, junction-case RθJC 1.74 ℃/W 1
Thermal resistance, junction-ambient RθJA 62 ℃/W 1 in2 FR-4 board, 2oz Cu, still air, Ta=25 ℃ 2
Input capacitance Ciss 1190.6 pF VGS=0 V, VDS=50 V, f=1 MHz 2
Output capacitance Coss 194.6 pF VGS=0 V, VDS=50 V, f=1 MHz 2
Reverse transfer capacitance Crss 4.1 pF VGS=0 V, VDS=50 V, f=1 MHz 2
Turn-on delay time td(on) 17.8 ns VGS=10 V, VDS=50 V, RG=2.2 Ω, ID=10 A 2
Rise time tr 3.9 ns VGS=10 V, VDS=50 V, RG=2.2 Ω, ID=10 A 2
Turn-off delay time td(off) 33.5 ns VGS=10 V, VDS=50 V, RG=2.2 Ω, ID=10 A 2
Fall time tf 3.2 ns VGS=10 V, VDS=50 V, RG=2.2 Ω, ID=10 A 2
Total gate charge Qg 19.8 nC ID=8 A, VDS=50 V, VGS=10 V 2
Gate-source charge Qgs 2.4 nC ID=8 A, VDS=50 V, VGS=10 V 2
Gate-drain charge Qgd 5.3 nC ID=8 A, VDS=50 V, VGS=10 V 2
Gate plateau voltage Vplateau 3.2 V ID=8 A, VDS=50 V, VGS=10 V 2
Reverse recovery time trr 50.2 ns IS=8 A, di/dt=100 A/μs 2
Reverse recovery charge Qrr 95.1 nC IS=8 A, di/dt=100 A/μs 2
Peak reverse recovery current Irrm 2.5 A IS=8 A, di/dt=100 A/μs 2

CAD (KiCad official)

  • Symbol: IAUC26N10S5L245
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN-8(5x6) (KiCad packages3D, STEP)
  • 3D model files: iauc26n10s5l245-etched.step / iauc26n10s5l245-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); iauc26n10s5l245.step / iauc26n10s5l245.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Leiditech datasheet (6 pp, sha256 e7c6da4db764ea49, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF