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HX8487-S

Public Made by Adom

by adom

ZHHXDZ RS-485 / RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HX8487-S

ZHHXDZ · RS-485 / RS-422 ICs · SOP-8

HX8487-S from ZHHXDZ, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver data output: RO is driven high when RE is low and A-B is at or above -50 mV, and driven low when A-B is at or below -200 mV.
2 RE input Active-low receiver enable: when RE is high the receiver output RO is placed in the high-impedance (Z) state.
3 DE input Driver enable, active high: when DE is high the driver is enabled, and when DE is low the A and B outputs are placed in the high-impedance (Z) state.
4 DI input Driver data input: DI sets the differential state of A/B when the driver is enabled (DE high), with DI high giving A high and B low.
5 GND power_in Ground reference for the device; all voltages are referenced to ground.
6 A bidirectional Non-inverting driver differential output and receiver differential input (A/B bus line); the bus allows up to 256 transceivers and ESD is rated ±15 kV HBM.
7 B bidirectional Inverting driver differential output and receiver differential input (A/B bus line); the bus allows up to 256 transceivers and ESD is rated ±15 kV HBM.
8 Vcc power_in Power supply, 4.5 V to 5.5 V working range (5 V ±5%).

Key specifications

Parameter Value
Manufacturer ZHHXDZ
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 6 V 2
Control input voltage (DE, RE) DE，RE 6 V 2
Drive input voltage (DI) DI 6 V 2
Drive output voltage / receive input voltage (A, B) A,B -7 12 V 2
Operating temperature range TOP -40 85 ℃ 2
Maximum operating temperature range TMOP -55 125 ℃ 2
Storage temperature range TSTG -55 150 ℃ 2
Power dissipation PD 470 mW SOP-8, +70℃ or above 2
Solder temperature TL 300 ℃ 10 seconds 2
Working voltage range Vcc 4.5 5.5 V 2
Driver differential output (with load) VOD2 1.5 V R=54Ω or R=27Ω, Figure 1 2
Change in driver differential output magnitude ΔVOD 0.2 V 2
Change in driver common-mode output voltage ΔVOC 0.2 V 2
Input high voltage VIH 2 V 2
Input low voltage VIL 0.8 V 2
Input current (DE, RE, DI) IIN1 -2 2 uA 2
Input current (A, B) IIN2 40 90 uA DE=0V, Vcc=5V 2
Input current (A, B) IIN2 60 100 uA VIN=0V 2
Receiver differential input threshold voltage VTH -200 -50 mV -7V ≤ VCM ≤ +12V 2
Receiver output high voltage VOH 4 V IO=-8mA 2
Receiver output low voltage VOL 0.4 V IO=8mA 2
Receiver output leakage (tri-state) IOZR 1 uA 0.4V ≤ Vo ≤ 2.4V 2
Receiver input resistance RIN 96 kΩ -7V ≤ VCM ≤ +12V 2
No-load operating current ICC 480 600 uA DE = Vcc, RE=DI=GND or Vcc 2
No-load operating current ICC 450 600 uA DE=GND, RE=DI=GND or Vcc (OCR truncated) 2
Receiver output short-circuit current IOSR 95 mA 0V ≤ VRO ≤ (truncated in text) 2
Driver differential propagation delay (low to high) tDPLH 60 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver differential propagation delay (high to low) tDPHL 60 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver rise time tDR 25 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver fall time tDF 25 nS RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver enable to high output tDZH 150 nS CL=100pF, Figure 4,6, S2 closed 2
Driver enable to low output tDZL 150 nS CL=100pF, Figure 4,6, S1 closed 2
Driver from low to off tDLZ 100 nS CL=15pF, Figure 4,6, S1 closed 2
Driver from high to off tDHZ 100 nS CL=15pF, Figure 4,6, S2 closed 2
Receiver input to output (low to high) tRPLH 150 nS /VID/ ≥2.0V; VID rising and falling time ≤15nS, Figure 7,9 2
Receiver input to output (high to low) tRPHL 150 nS /VID/ ≥2.0V; VID rising and falling time ≤15nS, Figure 7,9 2
Differential receiver offset (skew) tRSKEW -10 0 10 nS 2
Receiver enable to output low tRZL 20 50 nS CL=100pF, Figure 2,8 2
Receiver enable to output high tRZH 20 50 nS CL=100pF, Figure 2,8 2
Receiver from low to off tRLZ 20 50 nS CL=100pF, Figure 2,8 2
Receiver from high to off tRHZ 20 50 nS CL=100pF, Figure 2,8 2

CAD (KiCad official)

  • Symbol: HX8487-S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hx8487-s-etched.step / hx8487-s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hx8487-s.step / hx8487-s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZHHXDZ datasheet (4 pp, sha256 10a7e5c4d88c2ec9, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF