component
HX722IDRG
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HANSCHIP semiconductor Operational Amplifier, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHX722IDRG
HANSCHIP semiconductor · Operational Amplifier · SOP-8
HX722IDRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Channel A amplifier output with rail-to-rail swing, typically 0.1V from the rail at RL = 600Ω and 15mV at RL = 10kΩ. |
| 2 | INA- | input | Channel A inverting input, which must stay within Vss-0.5V to VDD+0.5V (absolute maximum). |
| 3 | INA+ | input | Channel A non-inverting input, whose common-mode range extends from -0.1V to VS+0.1V and which must stay within Vss-0.5V to VDD+0.5V (absolute maximum). |
| 4 | VSS | power_in | Negative supply or ground; the supply (VDD to Vss) is 2.1V to 5.5V in operation, or ±1.05V to ±2.75V with dual supplies. |
| 5 | INB+ | input | Channel B non-inverting input, which must stay within Vss-0.5V to VDD+0.5V (absolute maximum). |
| 6 | INB- | input | Channel B inverting input, which must stay within Vss-0.5V to VDD+0.5V (absolute maximum). |
| 7 | OUTB | output | Channel B amplifier output with rail-to-rail swing, typically 0.1V from the rail at RL = 600Ω and 15mV at RL = 10kΩ. |
| 8 | VDD | power_in | Positive supply, 2.1V to 5.5V operating (7.5V absolute maximum), with a 0.1µF ceramic bypass capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | 0.8 | 3.5 | mV | Vs=5V, TA=+25℃, VCM=VS/2, RL=600Ω | 3 | |
| Input Offset Voltage (-40℃ to 125℃) | VOS | 4.6 | mV | -40℃ to 125℃ | 3 | ||
| Common Mode Rejection Ratio | CMRR | 65 | 82 | dB | VS = 5.5V, VCM = -0.1V to 4V, +25℃ | 3 | |
| Common Mode Rejection Ratio (-40℃ to 125℃) | CMRR | 63 | dB | VS = 5.5V, VCM = -0.1V to 4V, -40℃ to 125℃ | 3 | ||
| Common Mode Rejection Ratio (VCM to 5.6V) | CMRR | 75 | dB | VS = 5.5V, VCM = -0.1V to 5.6V | 3 | ||
| Open-Loop Voltage Gain | AOL | 80 | 90 | dB | RL = 600Ω, VO = 0.15V to 4.85V, +25℃ | 3 | |
| Open-Loop Voltage Gain (-40℃ to 125℃) | AOL | 68 | dB | RL = 600Ω, VO = 0.15V to 4.85V, -40℃ to 125℃ | 3 | ||
| Open-Loop Voltage Gain (10kΩ) | AOL | 108 | dB | RL = 10kΩ, VO = 0.05V to 4.95V | 3 | ||
| Output Current | IOUT | 55 | 70 | mA | +25℃ | 3 | |
| Output Current (-40℃ to 125℃) | IOUT | 38 | mA | -40℃ to 125℃ | 3 | ||
| Operating Voltage Range | VS | 2.1 | 5.5 | V | 3 | ||
| Power Supply Rejection Ratio | PSRR | 74 | 91 | dB | VS = +2.5V to +5.5V, VCM = (-VS) + 0.5V, +25℃ | 3 | |
| Power Supply Rejection Ratio (-40℃ to 125℃) | PSRR | 68 | dB | VS = +2.5V to +5.5V, VCM = (-VS) + 0.5V, -40℃ to 125℃ | 3 | ||
| Quiescent Current/Amplifier | IQ | 1.1 | 1.5 | mA | IOUT = 0, +25℃ | 3 | |
| Quiescent Current/Amplifier (-40℃ to 125℃) | IQ | 1.85 | mA | IOUT = 0, -40℃ to 125℃ | 3 | ||
| Supply Voltage | VDD to Vss | -0.5 | 7.5 | V | 2 | ||
| Analog Input Voltage | IN+ or IN- | -0.5 | 0.5 | V | Vss-0.5V to VDD+0.5V (relative to supply rails) | 2 | |
| Operating Temperature Range | -40 | 125 | °C | 2 | |||
| Junction Temperature | 160 | °C | 2 | ||||
| Storage Temperature Range | -55 | 150 | °C | 2 | |||
| Lead Temperature | 260 | °C | soldering, 10sec | 2 | |||
| ESD HBM | HBM | 8 | KV | 2 | |||
| ESD MM | MM | 400 | V | 2 | |||
| Thermal Resistance SOP-8 | θJA | 125 | °C/W | TA=+25℃ | 2 | ||
| Input Bias Current | IB | 1 | pA | 3 | |||
| Input Offset Current | IOS | 1 | pA | 3 | |||
| Input Offset Voltage Drift | ΔVOS/ΔT | 2.4 | µV/℃ | 3 | |||
| Gain-Bandwidth Product | GBP | 11 | MHz | RL = 10kΩ, CL = 100pF | 3 | ||
| Phase Margin | φO | 51 | Degrees | RL = 10kΩ, CL = 100pF | 3 | ||
| Slew Rate | SR | 9 | V/µs | G = +1, 2V Step, RL = 10kΩ | 3 | ||
| Voltage Noise Density | en | 8 | nV/√Hz | f = 10kHz | 3 |
CAD (KiCad official)
- Symbol:
HX722IDRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hx722idrg-etched.step/hx722idrg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hx722idrg.step/hx722idrg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (14 pp, sha256
638e2a4af0258a42, retrieved 2026-10-31, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).