main
History Download
Ray Publish 0.1.0 8f16184 8d ago

HX65HVD3085-S

ZHHXDZ · RS-485 / RS-422 ICs · SOP-8

HX65HVD3085-S from ZHHXDZ, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver data output: RO is high when A-B is at or above -50 mV and low when A-B is at or below -200 mV, and the receiver fail-safe holds RO high for open-circuit or short-circuit inputs.
2 RE input Receiver enable input: RO is active when RE is low and goes high-impedance when RE is high.
3 DE input Driver enable input: the driver is active when DE is high, and A/B are high-impedance when DE is low.
4 DI input Driver data input: with DE high, DI high drives A high and B low, and DI low drives A low and B high.
5 GND power_in Ground reference for the device; all voltages are referenced to ground.
6 A bidirectional Bus line A (non-inverting): driver differential output and receiver input, with a common-mode range of -7 V to +12 V.
7 B bidirectional Bus line B (inverting): driver differential output and receiver input, with a common-mode range of -7 V to +12 V.
8 VCC power_in Power supply, 4.5 V to 5.5 V (5 V ±5%) as stated in the DC characteristics.

Key specifications

Parameter Value
Manufacturer ZHHXDZ
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Receiving output voltage RO -0.3 V 2
Supply voltage VCC -0.5 6 V 2
Control input voltage (DE, RE) DE,RE 6 V 2
Drive input voltage DI 6 V 2
Drive output voltage / receive input voltage A,B -7 12 V 2
Storage temperature range TSTG -55 150 °C 2
Operating temperature range TOP -40 85 °C 2
Maximum operating temperature range TMOP -55 125 °C 2
Power dissipation PD 470 mW SOP-8 (+70℃ or above) 2
Solder temperature TL 300 °C 10 seconds 2
Working voltage range VCC 4.5 5.5 V 2
Driver differential output (with load) VOD2 1.5 V R=54Ω or R=27Ω, Figure 1 2
Driver differential output (no load) VOD1 5 V 2
Change in magnitude of differential output ΔVOD 0.2 V 2
Common-mode output voltage VOC 1 3 V 2
Change in common-mode output voltage ΔVOC 0.2 V 2
Input high voltage VIH 2 V 2
Input low voltage VIL 0.8 V 2
Input current (DE, RE, DI) IIN1 -2 2 uA 2
Input current (A, B) IIN2 40 90 uA DE=0V, VCC=5V, VIN=5V 2
Input current (A, B) IIN2 60 100 uA VIN=0V 2
Receiver differential input threshold voltage VTH -200 -50 mV -7V≤VCM≤+12V 2
Receiver differential input threshold hysteresis ΔVTH 25 mV 2
Receiver output high voltage VOH 4 V IO=-8mA 2
Receiver output low voltage VOL 0.4 V IO=8mA 2
Receiver output tri-state leakage current IOZR 1 uA 0.4V≤VO≤2.4V 2
Receiver input resistance RIN 96 kΩ -7V≤VCM≤+12V 2
No load operating current (DE = VCC) ICC 480 600 uA DE = Vcc, RE=DI=GND or Vcc 2
No load operating current (DE = GND) ICC 450 600 uA DE=GND, RE=DI=GND or Vcc 2
Receiver output short-circuit current IOSR 95 mA 0V≤VRO≤VCC 2
ESD protection, human body model, A/B ESD -15 15 kV Between A/B, human body model 2
Driver input to output propagation delay (low to high) tDPLH 60 ns RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver input to output propagation delay (high to low) tDPHL 60 ns RDIFF=50Ω, CL1=CL2=100pF, Figure 3,5 2
Driver rise time tDR 25 ns 2
Driver fall time tDF 25 ns 2
Driver enable to output high tDZH 150 ns CL=100pF, Figure 4,6, S2 closed 2
Driver enable to output low tDZL 150 ns CL=100pF, Figure 4,6, S1 closed 2
Driver high output to off tDLZ 100 ns CL=15pF, Figure 4,6, S1 closed 2
Driver low output to off tDHZ 100 ns CL=15pF, Figure 4,6, S2 closed 2
Receiver input to output propagation delay (low to high) tRPLH 150 ns /VID/≥2.0V; rise/fall time ≤15ns, Figure 7,9 2
Receiver input to output propagation delay (high to low) tRPHL 150 ns /VID/≥2.0V; rise/fall time ≤15ns, Figure 7,9 2
Receiver differential propagation skew tRSKEW -10 0 10 ns 2
Receiver enable to output low tRZL 20 50 ns CL=100pF, Figure 2,8 2
Receiver enable to output high tRZH 20 50 ns CL=100pF, Figure 2,8 2
Receiver low output to off tRLZ 20 50 ns CL=100pF, Figure 2,8 2
Receiver high output to off tRHZ 20 50 ns CL=100pF, Figure 2,8 2
Maximum data speed fMAX 10 Mbps 1

CAD (KiCad official)

  • Symbol: HX65HVD3085-S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hx65hvd3085-s-etched.step / hx65hvd3085-s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hx65hvd3085-s.step / hx65hvd3085-s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZHHXDZ datasheet (4 pp, sha256 10251915c9aa219e, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF