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Contents

README

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HX65HVD231-S

ZHHXDZ · CAN Transceivers · SOP-8

HX65HVD231-S from ZHHXDZ, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D input CAN transmit data input (TXD, driver input): low for dominant bus state and high for recessive bus state, with MCU-side port voltage limited to -0.5 V to VCC+0.5 V.
2 GND power_in Ground connection; all voltages in the datasheet are referenced to this pin.
3 VCC power_in Transceiver 3.3 V supply pin, specified at 3 V to 3.6 V with an absolute maximum of -0.3 V to +6 V.
4 R output CAN receive data output (RXD, driver output): low for dominant and high for recessive bus state, with output current limited to -11 mA to 11 mA.
5 Vref power_out Vcc/2 reference output; it holds 0.45 VCC to 0.55 VCC for
6 CANL bidirectional Low-level CAN bus line; bus-side input voltage is rated -18 V to 18 V, and transient voltage on pins 6 and 7 is rated -25 V to +25 V (100 Ω test, see Fig. 9).
7 CANH bidirectional High-level CAN bus line; bus-side input voltage is rated -18 V to 18 V, and transient voltage on pins 6 and 7 is rated -25 V to +25 V (100 Ω test, see Fig. 9).
8 RS input Mode select: tied low (below 1.2 V, pulled to GND) for high-speed mode, tied high (above 0.75 VCC) for low-power sleep mode, and pulled to GND through a 10 kΩ to 100 kΩ resistor for slope-control mode.

Key specifications

Parameter Value
Manufacturer ZHHXDZ
Package SOP-8
Category Interface
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage Vcc 3 3.6 V 1
Maximum transmission rate (NRZ) 1/tbit 1 Mbaud 非归零码 1
CANH, CANL pin voltage Vcan -16 16 V 1
Bus differential voltage Vdiff 1.5 3 V 1
Supply voltage VCC -0.3 6 V 2
MCU-side port voltage D, R -0.5 V 2
Bus-side input voltage CANL, CANH -18 18 V 2
Transient voltage on pins 6, 7 Vtr -25 25 V 100Ω测试(见图 9) 2
Receiver output current IO -11 11 mA 2
Storage operating temperature range -40 150 ℃ 2
Ambient temperature -40 125 ℃ 2
Soldering temperature range 300 ℃ 2
Dominant output voltage, CANH VO(D) 2.45 V VI=0V,RS=0V,RL=60Ω(见图 1、图 2) 3
Dominant output voltage, CANL VO(D) 0.5 1.25 V VI=0V,RS=0V,RL=60Ω(见图 1、图 2) 3
Differential dominant output voltage VOD(D) 1.5 2 3 V VI=0V,RS=0V,RL=60Ω(见图 1) 3
Differential dominant output voltage VOD(D) 1.2 2 3 V VI=0V,RL=60Ω,RS=0V(见图 3) 3
Recessive output voltage, CANH VO(R) 2.3 V VI=3V,RS=0V,RL=60Ω(见图 1) 3
Recessive output voltage, CANL VO(R) 2.3 V VI=3V,RS=0V,RL=60Ω(见图 1) 3
Differential recessive output voltage VOD(R) -0.12 0.012 V VI=3V, RS=0V 3
Differential recessive output voltage, no load VOD(R) -0.5 0.05 V VI=3V, RS=0V, NO LOAD 3
Short-circuit output current, CANH IOS -250 mA CANH=-2V 3
Short-circuit output current, CANL IOS 250 mA CANL=7V 3
Propagation delay low to high tPLH 35 85 ns R=0,即短路(见图 4) 3
Propagation delay low to high tPLH 70 125 ns R=10 kΩ 3
Propagation delay high to low tPHL 70 120 ns R=0,即短路(见图 4) 3
Propagation delay high to low tPHL 130 180 ns R=10 kΩ 3
Differential output rise time tr 25 50 100 ns R=0,即短路(见图 4) 3
Differential output rise time tr 80 120 160 ns R=10 kΩ 3
Differential output rise time tr 600 800 1200 ns R=100 kΩ 3
Differential output fall time tf 40 55 80 ns R=0,即短路(见图 4) 3
Differential output fall time tf 80 125 150 ns R=10 kΩ 3
Differential output fall time tf 600 825 1000 ns R=100 kΩ 3
Receiver positive threshold VIT+ 750 900 mV 见表 1 4
Receiver negative threshold VIT- 500 650 mV 见表 1 4
Hysteresis Vhys 100 mV VIT+ - VIT- 4
High-level output voltage VOH 2.4 V -6V<VID<500mV, Io=-8mA(见图 5) 4
Low-level output voltage VOL 0.4 V 900mV<VID<6V, Io=8mA(见图 5) 4
Bus input current Ii 100 350 μA VIH=7V,VCC=0V 4
Bus input current Ii 100 250 μA VIH=7V,VCC=3.3V 4
Bus input current Ii -100 -20 μA VIH=-2V,VCC=0V 4
Bus input current Ii -200 -30 μA VIH=-2V,VCC=3.3V 4
Bus input resistance Ri 20 35 50 KΩ ISO 11898-2 对应标准 4
Differential input resistance Rdiff 40 100 KΩ ISO 11898-2 对应标准 4
Bus input capacitance ci 40 pF ISO 11898-2 对应标准 4
Differential input capacitance cdiff 20 pF ISO 11898-2 对应标准 4
Receiver propagation delay low to high tpLH 35 50 ns 见图 6 5
Receiver propagation delay high to low tpHL 35 50 ns 见图 6 5
Receiver output rise time tr 1.5 ns 见图 6 5
Receiver output fall time tf 1.5 ns 见图 6 5
Loop delay 1, driver input to receiver output, recessive to dominant t(LOOP1) 70 115 ns R=0,即短路(见图 8) 5
Loop delay 1, driver input to receiver output, recessive to dominant t(LOOP1) 105 175 ns R=10 kΩ 5
Loop delay 2, driver input to receiver output, dominant to recessive t(LOOP2) 100 135 ns R=0,即短路(见图 8) 5
Loop delay 2, driver input to receiver output, dominant to recessive t(LOOP2) 155 185 ns R=10 kΩ 5
Thermal shutdown threshold Tj(sd) 155 165 180 ℃ 5
Sleep-to-wake time TWAKE 3 5 us RS加入方波(见图 7) 6
High-speed mode input current IRS -450 0 μA VRS<1V 6
Power-off leakage current Ioff -250 250 μA Vcc=0V,VCANH=VCANL=5V 6
Supply current, sleep mode ICC 0.04 1 μA RS=VCC, VI=VCC 6
Supply current, dominant 50 70 mA VI=0V, RS=0V, LOAD=60Ω 6
Supply current, recessive 6 10 mA VI=VCC, RS=0V, NO LOAD 6

CAD (KiCad official)

  • Symbol: HX65HVD231-S
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: hx65hvd231-s-etched.step / hx65hvd231-s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hx65hvd231-s.step / hx65hvd231-s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZHHXDZ datasheet (12 pp, sha256 729b111f3f6e216e, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF