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HX4069-S

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ZHHXDZ Inverters, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HX4069-S

ZHHXDZ · Inverters · SOP-14

HX4069-S from ZHHXDZ, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A (CH1 input) input Input of inverter channel 1; the datasheet gives the input voltage range as 0 V to VDD, with absolute maximum input current of ±10 mA.
2 1Y (CH1 output) output Output of inverter channel 1, a symmetrical CMOS push-pull output driven from VDD and ground.
3 2A (CH2 input) input Input of inverter channel 2; the datasheet gives the input voltage range as 0 V to VDD, with absolute maximum input current of ±10 mA.
4 2Y (CH2 output) output Output of inverter channel 2, a symmetrical CMOS push-pull output driven from VDD and ground.
5 3A (CH3 input) input Input of inverter channel 3; the datasheet gives the input voltage range as 0 V to VDD, with absolute maximum input current of ±10 mA.
6 3Y (CH3 output) output Output of inverter channel 3, a symmetrical CMOS push-pull output driven from VDD and ground.
7 GND power_in Ground reference pin for the six CMOS inverters.
8 4Y (CH4 output) output Output of inverter channel 4, a symmetrical CMOS push-pull output driven from VDD and ground.
9 4A (CH4 input) input Input of inverter channel 4; the datasheet gives the input voltage range as 0 V to VDD, with absolute maximum input current of ±10 mA.
10 5Y (CH5 output) output Output of inverter channel 5, a symmetrical CMOS push-pull output driven from VDD and ground.
11 5A (CH5 input) input Input of inverter channel 5; the datasheet gives the input voltage range as 0 V to VDD, with absolute maximum input current of ±10 mA.
12 6Y (CH6 output) output Output of inverter channel 6, a symmetrical CMOS push-pull output driven from VDD and ground.
13 6A (CH6 input) input Input of inverter channel 6; the datasheet gives the input voltage range as 0 V to VDD, with absolute maximum input current of ±10 mA.
14 VDD power_in Positive supply pin; the recommended operating voltage is 3 V to 16 V and the absolute maximum supply voltage is 18 V.

Key specifications

Parameter Value
Manufacturer ZHHXDZ
Package SOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (absolute maximum) VDD -0.5 18 V 2
Input voltage (absolute maximum) VIN -0.5 V max printed as VDD+0.5V 2
Input current (absolute maximum) IIN -10 10 mA 2
Storage temperature (absolute maximum) Tstg -65 150 ℃ 2
Junction temperature (absolute maximum) TJ 150 ℃ 2
Welding temperature (absolute maximum) 265 ℃ 2
Operating voltage (recommended) VDD 3 16 V 2
Input voltage (recommended) VIN 0 V max printed as VDD 2
Operating temperature (recommended) TA -25 85 ℃ 2
Propagation delay high-to-low tPHL tPHL 35 110 ns VDD=5V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Propagation delay high-to-low tPHL tPHL 22 60 ns VDD=10V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Propagation delay high-to-low tPHL tPHL 32 50 ns VDD=15V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Propagation delay low-to-high tPLH tPLH 46 110 ns VDD=5V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Propagation delay low-to-high tPLH tPLH 30 60 ns VDD=10V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Propagation delay low-to-high tPLH tPLH 20 50 ns VDD=15V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Transition high-to-low tTHL tTHL 52 200 ns VDD=5V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Transition high-to-low tTHL tTHL 26 100 ns VDD=10V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Transition high-to-low tTHL tTHL 54 80 ns VDD=15V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Transition low-to-high tTLH tTLH 75 200 ns VDD=5V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Transition low-to-high tTLH tTLH 40 100 ns VDD=10V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Transition low-to-high tTLH tTLH 36 80 ns VDD=15V; CL=50pF; RL=200KΩ; VIN=1KHz 50% square wave; tr=tf≤20ns 2
Input capacitance CIN 15 pF Any input 2
Output low level voltage VOL 0 0.05 V TA=25℃; VDD=5V 3
Output high level voltage VOH 4.95 5 V TA=25℃; VIN=0V; VDD=5V 3
Output high level voltage VOH 9.95 10 V TA=25℃; VIN=0V; VDD=10V 3
Output high level voltage VOH 14.95 15 V TA=25℃; VIN=0V; VDD=15V 3
Input low-level voltage VIL 1 V TA=25℃; VO=4.5V; VDD=5V 3
Input low-level voltage VIL 2 V TA=25℃; VO=9.5V; VDD=10V 3
Input low-level voltage VIL 2.5 V TA=25℃; VO=13.5V; VDD=15V 3
Input high-level voltage VIH 4 V TA=25℃; VO=0.5V; VDD=5V 3
Input high-level voltage VIH 8 V TA=25℃; VO=1V; VDD=10V 3
Input high-level voltage VIH 12.5 V TA=25℃; VO=1.5V; VDD=15V 3
Output low level current IOL 1.1 2.2 mA TA=25℃; VO=0.4V; VDD=5V 3
Output low level current IOL 2.5 5 mA TA=25℃; VO=0.5V; VDD=10V 3
Output low level current IOL 9 18 mA TA=25℃; VO=1.5V; VDD=15V 3
Output high level current IOH -1.2 -0.6 mA TA=25℃; VO=4.6V; VDD=5V 3
Output high level current IOH -2.6 -1.3 mA TA=25℃; VO=9.5V; VDD=10V 3
Output high level current IOH -7.2 -3.6 mA TA=25℃; VO=13.5V; VDD=15V 3
Input leakage current IIN -1 1 uA TA=25℃; VIN=0V~15V; VDD=15V 3
Supply current IDD 1 uA TA=25℃; VIN=0V or 5V; VDD=5V 3

CAD (KiCad official)

  • Symbol: HX4069-S
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOP-14 (KiCad packages3D, STEP)
  • 3D model files: hx4069-s-etched.step / hx4069-s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hx4069-s.step / hx4069-s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ZHHXDZ datasheet (5 pp, sha256 b95c0d7c2660ec3e, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF