component
HX24C128DRG
Public Made by Adomby adom
HANSCHIP semiconductor EEPROM, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHX24C128DRG
HANSCHIP semiconductor · EEPROM · SOP-8
HX24C128DRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Device address input that can be hardwired to select one of up to four devices on a bus, or left floating, in which case it is internally pulled down to GND. |
| 2 | A1 | input | Device address input that can be hardwired to select one of up to four devices on a bus, or left floating, in which case it is internally pulled down to GND. |
| 3 | NC | unconnected | No connect pin per the datasheet pin table. |
| 4 | GND | power_in | Ground reference for the device. |
| 5 | SDA | bidirectional | Bidirectional open-drain serial data line that may be wire-ORed with other open-drain or open-collector devices; SDA may change only while SCL is low. |
| 6 | SCL | input | Serial clock input; data is clocked into the EEPROM on the SCL positive edge and clocked out on the negative edge. |
| 7 | WP | input | Write protect input: connected to GND allows normal write operations, while connected to VCC inhibits all writes to the memory; if floating it is internally pulled down to GND. |
| 8 | VCC | power_in | Power supply, 1.8 V to 5.5 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HANSCHIP semiconductor |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | -0.3 | 6.5 | V | 8 | |||
| Operating Ambient Temperature | -40 | 85 | °C | 8 | |||
| Storage Temperature | -55 | 125 | °C | 8 | |||
| Lead Temperature (Soldering, 10 seconds) | 245 | °C | Soldering, 10 seconds | 8 | |||
| Operating Ambient Temperature | TA | -40 | 85 | °C | 9 | ||
| Supply Voltage | VCC1 | 1.8 | 5.5 | V | 9 | ||
| Supply Voltage | VCC2 | 2.5 | 5.5 | V | 9 | ||
| Supply Voltage | VCC3 | 2.7 | 5.5 | V | 9 | ||
| Supply Voltage | VCC4 | 4.5 | 5.5 | V | 9 | ||
| Supply Current | ICC1 | 0.4 | 1 | mA | VCC = 5.0V; READ at 400 kHz | 9 | |
| Supply Current | ICC2 | 2 | 3 | mA | VCC = 5.0V; WRITE at 400 kHz | 9 | |
| Standby Current | ISB1 | 0.6 | 1 | µA | VCC = 1.8V; VIN= VCC or VSS | 9 | |
| Standby Current | ISB2 | 1 | 2 | µA | VCC = 2.5V; VIN= VCC or VSS | 9 | |
| Standby Current | ISB4 | 1 | 3 | µA | VCC = 5.0V; VIN= VCC or VSS | 9 | |
| Input Leakage Current | ILI | 0.1 | 3 | µA | VIN = VCC or VSS | 9 | |
| Output Leakage Current | ILO | 0.05 | 3 | µA | VOUT = VCC or VSS | 9 | |
| Input Low Level | VIL | -0.6 | V | 9 | |||
| Output Low Level | VOL3 | 0.4 | V | VCC = 5.0V; IOL = 3.0 mA | 9 | ||
| Output Low Level | VOL1 | 0.2 | V | VCC = 1.8V; IOL = 0.15 mA | 9 | ||
| Input/Output Capacitance (SDA) | CI/O | 8 | pF | VI/O = 0V; TA=25℃, f=1.0MHz, VCC=+1.8V | 9 | ||
| Input Capacitance (A0, A1, A2, SCL) | CIN | 6 | pF | VIN = 0V; TA=25℃, f=1.0MHz, VCC=+1.8V | 9 | ||
| Clock Frequency, SCL | fSCL | 400 | kHz | 9 | |||
| Clock Pulse Width Low | tLOW | 1.2 | µs | 9 | |||
| Clock Pulse Width High | tHIGH | 0.6 | µs | 10 | |||
| Noise Suppression Time | tI | 50 | ns | 10 | |||
| Clock Low to Data Out Valid | tAA | 0.1 | 0.9 | µs | 10 | ||
| Time the bus must be free before a new transmission can start | tBUF | 1.2 | µs | 10 | |||
| Start Hold Time | tHD.STA | 0.6 | µs | 10 | |||
| Start Setup Time | tSU.STA | 0.6 | µs | 10 | |||
| Data In Hold Time | tHD.DAT | 0 | µs | 10 | |||
| Data In Setup Time | tSU.DAT | 100 | ns | 10 | |||
| Inputs Rise Time | tR | 0.3 | µs | 10 | |||
| Inputs Fall Time | tF | 300 | ns | 10 | |||
| Stop Setup Time | tSU.STO | 0.6 | µs | 10 | |||
| Data Out Hold Time | tDH | 50 | ns | 10 | |||
| Write Cycle Time | tWR | 5 | ms | Note 1: time from valid stop of write sequence to end of internal clear/write cycle | 10 |
CAD (KiCad official)
- Symbol:
HX24C128DRG - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
hx24c128drg-etched.step/hx24c128drg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);hx24c128drg.step/hx24c128drg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HANSCHIP semiconductor datasheet (14 pp, sha256
aa353337ce1b7552, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).