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HV7801K1-G

Public Made by Adom

by adom

Microchip Tech Monitors & Reset Circuits, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HV7801K1-G

Microchip Tech · Monitors & Reset Circuits · SOT-23-5

HV7801K1-G from Microchip Tech, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 LOAD input High impedance sense amplifier input with Zener diode protection; add an external protection resistor in series if VSENSE exceeds the range of -600mV to +5.0V.
2 NC unconnected No connect; this pin must be left floating for proper operation.
3 IN power_in Sense amplifier input and supply, with supply voltage range of 8V to 450V.
4 GND power_in Supply return (ground).
5 OUT output Output with a nominal output resistance of 16.5kΩ; accuracy preservation may require an external buffer amplifier to prevent excessive loading.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOT-23-5
Category Power Supply Chip
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VIN 8 450 V Values apply over the full temperature range 2
Quiescent supply current IQ 50 µA VIN = 8V to 450V, VSENSE = 0mV 2
Output voltage VOUT 0 65 mV VSENSE = 0mV 2
Output voltage VOUT 420 580 mV VSENSE = 100mV 2
Output voltage VOUT 913 1087 mV VSENSE = 200mV 2
Output voltage VOUT 2395 2605 mV VSENSE = 500mV 2
Output rise time, 10% to 90% tRISE 2 µs VSENSE step 0mV to 500mV 2
Output fall time, 90% to 10% tFALL 0.7 2 µs VSENSE step 500mV to 0mV 2
Output rise time, 10% to 90% tRISE 0.7 µs VSENSE step 5.0mV to 500mV 2
OUT pin output resistance ROUT 16.5 kΩ 2
Voltage gain tolerance -1 5 1 % Typical gain 5.0±1% 1
VIN, VLOAD absolute maximum VIN, VLOAD -0.5 460 V 2
VOUT absolute maximum VOUT -0.5 10 V 2
VSENSE absolute maximum VSENSE -0.5 5 V 2
ILOAD absolute maximum ILOAD -10 10 mA 2
Operating ambient temperature -40 85 °C 2
Operating junction temperature -40 125 °C 2
Storage temperature -65 150 °C 2
Maximum VSENSE VSENSE 500 mV Normal operating conditions 1
Thermal resistance, junction to ambient θja 253 °C/W 5-Lead SOT-23, JEDEC JESD51-7 testboard 2

CAD (KiCad official)

  • Symbol: HV7801K1-G
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: hv7801k1-g-etched.step / hv7801k1-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hv7801k1-g.step / hv7801k1-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (5 pp, sha256 0213e855416865b3, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF