main
History Download
Ray Publish 0.1.0 c99dce6 14d ago

HV56022T-V

Microchip Tech · Operational Amplifier · VQFN-20-EP(4x4)

HV56022T-V from Microchip Tech, in a VQFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLL power_in Logic input voltage supply (3.3V, 3.0V to 3.6V) required for the comparator pins; a 1 µF bypass capacitor is recommended.
2 SHDN input Shutdown input that deactivates the high voltage amplifiers when High (3.3V); VIH 2.0V to VLL, VIL 0 to 0.8V.
3 VIN0 input CH0 amplifier input with a range of 0 to 2.98V (absolute maximum -0.3V to 5.5V).
4 VIN1 input CH1 amplifier input with a range of 0 to 2.98V (absolute maximum -0.3V to 5.5V).
5 HVGND power_in High voltage ground reference pin for the high voltage amplifiers.
6 RBIAS passive Bias reference for the high voltage amplifiers; a 150 kΩ resistor sets a 124 Hz -3 dB bandwidth for 225V sinusoidal waveforms driving 0.22 µF.
7 Timer0 passive Delay timer 0 for comparator 0; a 1.5 nF capacitor gives a 1.6 ms delay with RBIAS = 150 kΩ (delay = 7.55RBIASC).
8 Comp0 output Comparator output 0 that goes High (3.3V) to flag a short when output drops 20% or more against the input signal.
9 Timer1 passive Delay timer 1 for comparator 1; a 1.5 nF capacitor gives a 1.6 ms delay with RBIAS = 150 kΩ (delay = 7.55RBIASC).
10 Comp1 output Comparator output 1 that goes High (3.3V) to flag a short when output drops 20% or more against the input signal.
11 VCC power_in Low voltage amplifier supply with an operating range of 6V to 7V (absolute maximum 8.0V); a 2 µF bypass capacitor is recommended close to the pin.
12 HVGND power_in High voltage ground reference pin for the high voltage amplifiers.
13 HVOUT1 output CH1 high voltage amplifier output, sourcing/sinking 40 mA minimum; a 10 nF preload capacitor is recommended.
14 VPP power_in High voltage amplifier supply of 50V to 225V (absolute maximum 250V); a 0.1 µF bypass capacitor is recommended close to the pin.
15 HVOUT0 output CH0 high voltage amplifier output, sourcing/sinking 40 mA minimum; a 10 nF preload capacitor is recommended.
16 HVGND power_in High voltage ground reference pin for the high voltage amplifiers.
17 NC unconnected No connection; may be connected to HVGND to reduce thermal resistance to the PCB ground plane.
18 NC unconnected No connection; may be connected to HVGND to reduce thermal resistance to the PCB ground plane.
19 NC unconnected No connection; may be connected to HVGND to reduce thermal resistance to the PCB ground plane.
20 NC unconnected No connection; may be connected to HVGND to reduce thermal resistance to the PCB ground plane.
21 HVGND power_in Exposed pad connected to high voltage ground; the main thermal path, to be tied to HVGND copper with numerous vias.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-20-EP(4x4)
Category Operational Amplifier/Comparator
Pins 21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High Voltage Supply VPP 50 225 V 4
HV Op-Amps Low Voltage Supply VCC 6 6.5 7 V 4
HV Op-Amps Input Analog Voltage VIN0,1 0 2.98 V VPP = 225V, VCC= 6.5V 4
VPP Quiescent Supply Current IPPQ 4.5 mA VIN0,1= 0V, SHDN = 0 4
VPP Shutdown Supply Current IPPDN 2 µA SHDN = 1 4
HVOUT High Level Output VOH 214 V VCC= 6.5V, VPP = 225V, IHVOUT = 100uA 4
HVOUT Low Level Output VOL 1 V VCC= 6.5V, VPP = 225V, IHVOUT = -100uA 4
HV Op-Amps Output Offset Voltage HVOFFSET -1.1 1.1 V 4
HVOUT Output Source Current IHVOUT(SOURCE) 40 mA 100V ≤ VPP ≤ 225V, VCC= 6.5V 4
HVOUT Output Sink Current IHVOUT(SINK) 40 mA 100V ≤ VPP ≤ 225V, VCC= 6.5V 4
HVOUT Slew Rate SRHV 0.09 V/µs VPP = 225V, VCC= 6.5V, CL = 0.22F 4
Closed Loop Gain AV 72 75 78 V/V VPP = 225V, VCC= 6.5V, No Load 4
Shut Down Input Pin SHDN 0.3 3.3 V 4
Comparator Output High Logic VOH 2 3.3 V COMP0, COMP1 4
Comparator Output Low Logic VOL 0 0.8 V COMP0, COMP1 4
Comparator Delay tDELAY 0.6 1.6 2.6 ms 1.5 nF at Timer0, 1 pins, RBIAS = 150 k 4
HV Op-Amps Low Voltage Supply Current ICC 0.2 mA VCC= 6.5V, VPP = 225V (Note 1), fHVOUT = 124Hz, sine wave VIN0,1= 0 to 2.98V, CL = 0.22F 4
VPP Supply Current IPP 16.5 mA VCC= 6.5V, VPP = 225V, fHVOUT = 124Hz (Note 1), sine wave VIN0,1= 0 to 2.98V, CL = 0.22F 4
HVOUT -3 dB Bandwidth BW124Hz 124 Hz VPP = 225V, VCC= 6.5V, CL = 0 to 0.22F, HVOUT = Full scale output, 25°C ≤ TJ ≤ 60°C, RBIAS= 150 k (Note 1) 4
HV Op-Amps Shutdown Time tSHDN 300 ns VPP = 225V, VCC= 6.5V, SHDN = 0 to 1, VIN0,1 = 0 (Note 2) 4
HV Op-Amps Wake-Up Time from Shutdown tWKUP 2 ms VPP = 225V, VCC= 6.5V, SHDN = 1 to 0, VIN0,1 = 0 (Note 2) 4
HV Op-Amp Output Preload Capacitor CPRE 10 nF Note 2 4
Comparator Output Sink Current CISINK -2 mA Note 1 4
Comparator Output Source Current CISOURCE 2 mA Note 1 4
Comparator Input Offset VOFFSET 110 mV Note 1 4
High Voltage Supply VPP 50 225 V 3
Low Voltage Supply VCC 6 6.5 7 V 3
Logic Supply Voltage VLL 3 3.3 3.6 V 3
High Level Input Logic VIH 2 V for SHDN; max printed as VLL 3
Low Level Input Logic VIL 0 0.8 V 3
Inputs for High Voltage Op-Amps VIN0,1 0 2.98 V 3
VLL, Low Voltage Logic Supply VLL -0.3 5.5 V 3
VIN0,1, High Voltage Op-Amps Inputs VIN0,1 -0.3 5.5 V 3
VCC, Low Voltage Supply for High Voltage Op-Amps VCC -0.3 8 V 3
VPP, High Voltage Supply for Op-Amps VPP -0.3 250 V 3
Storage Temperature -55 150 °C 3
Operating Junction Temperature 0 125 °C 3
Operating Junction Temperature TJ 0 125 °C 5
Storage Temperature TA -55 150 °C 5
Thermal Resistance, junction to case (20-Lead VQFN) θJC 2.2 °C/W Note 1: 4 Layers FR4 4” X 4” PCB 5
Thermal Resistance, junction to ambient (20-Lead VQFN) θJA 43 °C/W Note 1: 4 Layers FR4 4” X 4” PCB 5

CAD (KiCad official)

  • Symbol: HV56022T-V
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: VQFN-20-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: hv56022t-v-etched.step / hv56022t-v-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hv56022t-v.step / hv56022t-v.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (25 pp, sha256 11dd7b3334c6d245, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF