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HV507PG-G

Public Made by Adom

by adom

Microchip Tech Pre-ordered MCUs, PQFP-80(14x20). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HV507PG-G

Microchip Tech · Pre-ordered MCUs · PQFP-80(14x20)

HV507PG-G from Microchip Tech, in a PQFP-80(14x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVOUT41 output High-voltage push-pull output 41.
2 HVOUT42 output High-voltage push-pull output 42.
3 HVOUT43 output High-voltage push-pull output 43.
4 HVOUT44 output High-voltage push-pull output 44.
5 HVOUT45 output High-voltage push-pull output 45.
6 HVOUT46 output High-voltage push-pull output 46.
7 HVOUT47 output High-voltage push-pull output 47.
8 HVOUT48 output High-voltage push-pull output 48.
9 HVOUT49 output High-voltage push-pull output 49.
10 HVOUT50 output High-voltage push-pull output 50.
11 HVOUT51 output High-voltage push-pull output 51.
12 HVOUT52 output High-voltage push-pull output 52.
13 HVOUT53 output High-voltage push-pull output 53.
14 HVOUT54 output High-voltage push-pull output 54.
15 HVOUT55 output High-voltage push-pull output 55.
16 HVOUT56 output High-voltage push-pull output 56.
17 HVOUT57 output High-voltage push-pull output 57.
18 HVOUT58 output High-voltage push-pull output 58.
19 HVOUT59 output High-voltage push-pull output 59.
20 HVOUT60 output High-voltage push-pull output 60.
21 HVOUT61 output High-voltage push-pull output 61.
22 HVOUT62 output High-voltage push-pull output 62.
23 HVOUT63 output High-voltage push-pull output 63.
24 HVOUT64 output High-voltage push-pull output 64.
25 VPP power_in High-voltage power supply, 60V to 300V recommended; must not drop below VDD or float during operation.
26 DIOA bidirectional Serial data input/output A; data input when DIR is low, data output when DIR is high.
27 NC unconnected No connection.
28 NC unconnected No connection.
29 BL input Blanking input controlling blanking of the outputs; does not affect shift register operation.
30 POL input Polarity select input for the outputs; does not affect shift register operation.
31 VDD power_in Low-voltage logic power supply, 4.5V to 5.5V recommended.
32 DIR input Direction input; low makes DIOA data in and DIOB data out (HVOUT64 to HVOUT1), high reverses it.
33 GND power_in Logic voltage ground.
34 HVGND power_in High-voltage power supply ground.
35 NC unconnected No connection.
36 NC unconnected No connection.
37 CLK input Data shift register clock; inputs are shifted into the shift register on the positive clock edge, up to 8 MHz.
38 LE input Latch enable; shift register data transfers to the latches while LE is high and is stored on the high-to-low transition.
39 DIOB bidirectional Serial data input/output B; data output when DIR is low, data input when DIR is high.
40 VPP power_in High-voltage power supply, 60V to 300V recommended; must not drop below VDD or float during operation.
41 HVOUT1 output High-voltage push-pull output 1.
42 HVOUT2 output High-voltage push-pull output 2.
43 HVOUT3 output High-voltage push-pull output 3.
44 HVOUT4 output High-voltage push-pull output 4.
45 HVOUT5 output High-voltage push-pull output 5.
46 HVOUT6 output High-voltage push-pull output 6.
47 HVOUT7 output High-voltage push-pull output 7.
48 HVOUT8 output High-voltage push-pull output 8.
49 HVOUT9 output High-voltage push-pull output 9.
50 HVOUT10 output High-voltage push-pull output 10.
51 HVOUT11 output High-voltage push-pull output 11.
52 HVOUT12 output High-voltage push-pull output 12.
53 HVOUT13 output High-voltage push-pull output 13.
54 HVOUT14 output High-voltage push-pull output 14.
55 HVOUT15 output High-voltage push-pull output 15.
56 HVOUT16 output High-voltage push-pull output 16.
57 HVOUT17 output High-voltage push-pull output 17.
58 HVOUT18 output High-voltage push-pull output 18.
59 HVOUT19 output High-voltage push-pull output 19.
60 HVOUT20 output High-voltage push-pull output 20.
61 HVOUT21 output High-voltage push-pull output 21.
62 HVOUT22 output High-voltage push-pull output 22.
63 HVOUT23 output High-voltage push-pull output 23.
64 HVOUT24 output High-voltage push-pull output 24.
65 HVOUT25 output High-voltage push-pull output 25.
66 HVOUT26 output High-voltage push-pull output 26.
67 HVOUT27 output High-voltage push-pull output 27.
68 HVOUT28 output High-voltage push-pull output 28.
69 HVOUT29 output High-voltage push-pull output 29.
70 HVOUT30 output High-voltage push-pull output 30.
71 HVOUT31 output High-voltage push-pull output 31.
72 HVOUT32 output High-voltage push-pull output 32.
73 HVOUT33 output High-voltage push-pull output 33.
74 HVOUT34 output High-voltage push-pull output 34.
75 HVOUT35 output High-voltage push-pull output 35.
76 HVOUT36 output High-voltage push-pull output 36.
77 HVOUT37 output High-voltage push-pull output 37.
78 HVOUT38 output High-voltage push-pull output 38.
79 HVOUT39 output High-voltage push-pull output 39.
80 HVOUT40 output High-voltage push-pull output 40.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package PQFP-80(14x20)
Category Embedded Processors & Controllers
Pins 80

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD Supply Current IDD 15 mA fCLK = 8 MHz, fDATA = 4 MHz, LE = low 5
Quiescent VDD Supply Current IDDQ 200 µA All VIN = 0V or VDD 5
High-voltage Supply Current, outputs high IPP 0.5 mA VPP = 300V, all outputs high 5
High-voltage Supply Current, outputs low IPP 0.5 mA VPP = 300V, all outputs low 5
High-level Logic Input Current IIH 10 µA VIN = VDD 5
Low-level Logic Input Current IIL -10 µA VIN = 0V 5
High-level Output HVOUT VOH 265 V VPP = 300V, IHVOUT = -1 mA 5
Low-level Output HVOUT VOL 35 V VDD = 5V, IHVOUT = 1 mA 5
Low-level Output Data Out VOL 1 V VDD = 5V, IDOUT = 100 µA 5
HVOUT Clamp Voltage (low) VOC -30 V IOL = -1 mA 5
Clock Frequency fCLK 8 MHz 5
Clock Width High or Low tWL, tWH 62 ns 5
Data Set-up Time before Clock Rises tSU 35 ns 5
Data Hold Time after Clock Rises tH 30 ns 5
Time from Latch Enable to HVOUT tON, tOFF 4 ns CL = 20 pF 5
Latch Enable Pulse Width tWLE 80 ns 5
Delay Time Clock to Latch Enable Low to High tDLE 35 ns 5
Latch Enable Set-up Time before Clock Rises tSLE 40 ns 5
Delay Time Clock to Data Low to High tDLH 125 ns CL = 20 pF 5
Delay Time Clock to Data High to Low tDHL 125 ns CL = 20 pF 5
All Logic Inputs rise/fall time tr, tf 5 ns 5
Logic Supply Voltage VDD 4.5 5 5.5 V 4
High-voltage Supply Voltage VPP 60 300 V 4
Low-level Input Voltage VIL 0 0.9 V 4
Operating Ambient Temperature TA 0 70 °C 6
Low-supply Voltage VDD -0.5 6 V 4
High-supply Voltage VPP 320 V VDD to +320V 4
Logic Input Levels -0.5 V -0.5V to VDD+0.5V 4
Ground Current 0.5 A Note 2 4
High-voltage Supply Current 0.5 A Note 1 4
Storage Temperature TS -65 150 °C 4
Continuous Total Power Dissipation 80-lead PQFP 1200 mW Note 2 4
Thermal Resistance 80-lead PQFP θJA 37 °C/W 6

CAD (KiCad official)

  • Symbol: HV507PG-G
  • Footprint: Package_QFP:PQFP-80_14x20mm_P0.8mm
  • 3D model: PQFP-80(14x20) (KiCad packages3D, STEP)
  • 3D model files: hv507pg-g-etched.step / hv507pg-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); hv507pg-g.step / hv507pg-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (16 pp, sha256 e17ea7ca8b774dde, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF