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HTP4056

Public Made by Adom

by adom

HXY MOSFET Battery Management, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs htp4056: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
htp4056-etched.fit.json htp4056: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
htp4056-etched.glb htp4056: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
htp4056-etched.step htp4056: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
htp4056.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
htp4056.kicad_mod Publish 0.1.0 · Ray
htp4056.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
htp4056.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
htp4056.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
package.json Publish 0.2.0 · Ray
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
page.json htp4056: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md htp4056: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

HTP4056

HXY MOSFET · Battery Management · ESOP-8

HTP4056 from HXY MOSFET, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TEMP input Battery temperature sense input. Connects to an NTC thermistor divider from the battery pack; charging is inhibited when the pin voltage falls outside the VTEMP-L (~45%VCC) to VTEMP-H (~80%VCC) window.
2 PROG passive Charge current program pin. An external resistor from PROG to GND sets the constant-current charge level (VPROG ≈ 1.0 V; IBAT = 1000 mA with RPROG = 1.4 kΩ). Can also be used to monitor charge current.
3 GND power_in Device ground. Tie to system ground; also connect the exposed thermal pad to GND for optimal thermal performance.
4 VCC power_in Charger input supply. Operating range 4.0 V to 6 V (absolute max 8.5 V). Provides current to the internal power PMOSFET that charges the battery on BAT.
5 BAT power_out Battery charge output. Connects to the positive terminal of the single-cell Li-ion battery. Regulated float voltage 4.200 V; delivers up to ~1.0 A (ESOP-8) programmable charge current with ≤2 µA leakage when VCC is removed.
6 STDBY output Open-drain charge-complete (standby) status indicator. Pulls low when the charge cycle terminates and the part enters standby; high-impedance otherwise. VOL ≤ 0.3 V at 5 mA sink; typically drives an LED to GND through a pull-up.
7 CHRG output Open-drain charging status indicator. Pulls low while charging is in progress; high-impedance when charging is complete, in shutdown, or in fault. VOL ≤ 0.3 V at 5 mA sink; typically drives an LED to GND through a pull-up.
8 NC unconnected No internal connection. Leave floating or tie to GND.
EP GND power_in Exposed thermal pad on the underside of the ESOP-8 package. Must be soldered to the PCB ground plane for both electrical ground and heat sinking (θJA = 50 °C/W).

Key specifications

Parameter Value
Manufacturer HXY MOSFET
Package ESOP-8
Category PMIC
Pins 9

CAD (KiCad official)

  • Symbol: HTP4056
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: htp4056-etched.step / htp4056-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); htp4056.step / htp4056.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
htp4056.step 193 KB You want the bare part, or you mark your own boards.
htp4056-etched.step 1.3 MB You want the part with HTP4056 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 333 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HXY MOSFET datasheet (13 pp, sha256 0e9323593bab6954, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF