component
HT9910BRZ
Public Made by Adomby adom
HTCSEMI LED Drivers, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownHT9910BRZ
HTCSEMI · LED Drivers · SOP-8
HT9910BRZ from HTCSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of the internal 8V to 450V linear regulator, input voltage 8V to 450V DC. |
| 2 | CS | input | Senses the LED string current through the external sense resistor, with a 250mV internal pull-in threshold. |
| 3 | GND | power_in | Device ground. |
| 4 | GATE | output | Drives the gate of the external MOSFET. |
| 5 | PWM_D | input | Low frequency PWM dimming pin and enable input with an internal 100kΩ pull-down to GND. |
| 6 | VDD | power_out | Internally regulated 7.5V nominal supply that can supply up to 1mA for external circuitry and needs a storage capacitor; must not exceed 12V. |
| 7 | LD | input | Linear dimming input that changes the current limit threshold at the current sense comparator (0 to 250mV). |
| 8 | RT | passive | Oscillator control; a resistor from this pin to ground sets the PWM frequency. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HTCSEMI |
| Package | SOP-8 |
| Category | Display Modules / LED Drivers / Display Drivers |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VIN to GND | VIN | -0.5 | 470 | V | 3 | ||
| CS, LD, PWM_D, GATE, RT to GND | -0.3 | V | max is VDD + 0.3V | 3 | |||
| VDD to GND | VDD | 12 | V | 3 | |||
| Continuous power dissipation 8-lead SOIC | 630 | mW | TA = +25°C | 3 | |||
| Junction temperature range | TJ | -40 | 150 | °C | 3 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 3 | ||
| Thermal resistance junction to ambient, 8-lead SOIC | Rθja | 128 | °C/W | 3 | |||
| Input DC supply voltage range | VINDC | 8 | 450 | V | DC input voltage | 3 | |
| Shut-down mode supply current | IINSD | 0.5 | 1 | mA | Pin PWM_D to GND | 3 | |
| Internally regulated voltage | VDD | 7.25 | 7.5 | 7.75 | V | VIN = 8V, IDD(ext)=0, 500pF at Gate; RT=226kΩ, PWM_D = VDD | 3 |
| Line regulation of VDD | ΔVDD,line | 0 | 1 | V | VIN = 8 - 450V, IDD(ext) = 0, 500pF at GATE; RT = 226kΩ, PWM_D = VDD | 3 | |
| Load regulation of VDD | ΔVDD,load | 0 | 100 | mV | IDD(ext) = 0 - 1mA, 500pF at GATE; RT = 226kΩ, PWMD = VDD | 3 | |
| VDD undervoltage lockout threshold | UVLO | 6.45 | 6.7 | 6.95 | V | VDD rising | 3 |
| VDD undervoltage lockout hysteresis | ΔUVLO | 500 | mV | VDD falling | 3 | ||
| Regulator supply current before UVLO | IIN,MAX | 5 | mA | VIN = 8V | 3 | ||
| PWM_D input low voltage | VEN(lo) | 0.8 | V | VIN = 8-450V | 3 | ||
| PWM_D input high voltage | VEN(hi) | 2 | V | VIN = 8-450V | 3 | ||
| PWM_D pull-down resistance | REN | 50 | 100 | 150 | kΩ | VEN = 5V | 3 |
| Current sense pull-in threshold voltage | VCS,TH | 225 | 250 | 275 | mV | -40°C < TA < +85°C | 3 |
| Current sense pull-in threshold voltage | VCS,TH | 213 | 250 | 287 | mV | TA < +125°C | 3 |
| Offset voltage for LD comparator | VOFFSET | -12 | 12 | mV | 3 | ||
| Current sense blanking interval | TBLANK | 150 | 215 | 280 | ns | 0< TA < +85°C, VLD = VDD, VCS= VCS,TH + 50mV after TBLANK | 3 |
| Current sense blanking interval | TBLANK | 145 | 215 | 315 | ns | -40°C < TA < +125°C, VLD = VDD, VCS= VCS,TH + 50mV after TBLANK | 3 |
| Delay to output | tDELAY | 80 | 150 | ns | VLD = VDD, VCS= VCS,TH + 50mV after TBLANK | 3 | |
| Oscillator frequency | fosc | 20 | 25 | 30 | kHz | RT = 1.00 MΩ | 3 |
| Oscillator frequency | fosc | 80 | 100 | 120 | kHz | RT = 226 kΩ | 3 |
| Gate sourcing current | ISOURCE | 0.165 | A | VGATE = 0V, VDD = 7.5V | 3 | ||
| Gate sinking current | ISINK | 0.165 | A | VGATE = VDD, VDD = 7.5V | 3 | ||
| GATE output rise time | tRISE | 30 | 50 | ns | CGATE = 500pF, VDD = 7.5V | 3 | |
| GATE output fall time | tFALL | 30 | 50 | ns | CGATE = 500pF, VDD = 7.5V | 3 |
CAD (KiCad official)
- Symbol:
HT9910BRZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ht9910brz-etched.step/ht9910brz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ht9910brz.step/ht9910brz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HTCSEMI datasheet (7 pp, sha256
fe5fb2a8846f612c, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).