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HT9201ARSZ
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HTCSEMI Analog To Digital Converters (ADC), SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HT9201ARSZ
HTCSEMI · Analog To Digital Converters (ADC) · SSOP-28-208mil
HT9201ARSZ from HTCSEMI, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVSS | power_in | Digital ground for the logic and output buffers, to be connected close to the ADC with the analog ground in a solid ground plane. |
| 2 | DVDD | power_in | Digital supply for the D0-D9 output buffers, operable from 2.7 V to 5.5 V independently of AVDD. |
| 3 | D0 | output | Bit 0 (LSB) of the straight-binary 10-bit output word, powered from DVDD, with a fan-out of one recommended and load kept below 20 pF. |
| 4 | D1 | output | Bit 1 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 5 | D2 | output | Bit 2 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 6 | D3 | output | Bit 3 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 7 | D4 | output | Bit 4 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 8 | D5 | output | Bit 5 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 9 | D6 | output | Bit 6 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 10 | D7 | output | Bit 7 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 11 | D8 | output | Bit 8 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 12 | D9 | output | Bit 9 (MSB) of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 13 | SELECT | input | Selects the output channel: high presents the I-channel word and low presents the Q-channel word, with the input referenced to AVDD/2 threshold. |
| 14 | CLOCK | input | Sample clock input, internally buffered from AVDD with threshold at AVDD/2, with clock pulse widths high and low of 22.5 ns each for 20 MSPS operation. |
| 15 | SLEEP | input | Power-down control: high powers the device down and low gives normal operation. |
| 16 | INA-I | input | I-channel analog input A, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 17 | INB-I | input | I-channel analog input B, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 18 | REFT-I | passive | Top reference decoupling node for the I channel, to be bypassed with chip capacitors placed close to the converter. |
| 19 | REFB-I | passive | Bottom reference decoupling node for the I channel, to be bypassed with chip capacitors placed close to the converter. |
| 20 | AVSS | power_in | Analog ground for the converters, reference and input buffers, to be joined with DVSS near the ADC. |
| 21 | REFSENSE | input | Reference mode select: tie to VREF for 1 V, to AVSS for 2 V, to AVDD for external reference, or to a divider tap for a programmable 0.7 V to 2.5 V reference. |
| 22 | VREF | power_in | Internal reference output, 1 V or 2 V depending on REFSENSE, which becomes an input when an external reference is applied. |
| 23 | AVDD | power_in | Analog supply, operable from 2.7 V to 5.5 V independently of DVDD, with absolute maximum AVDD to AVSS of -0.3 V to +6.5 V. |
| 24 | REFB-Q | passive | Bottom reference decoupling node for the Q channel, to be bypassed with chip capacitors placed close to the converter. |
| 25 | REFT-Q | passive | Top reference decoupling node for the Q channel, to be bypassed with chip capacitors placed close to the converter. |
| 26 | INB-Q | input | Q-channel analog input B, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 27 | INA-Q | input | Q-channel analog input A, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 28 | CHIP-SELECT | input | High places the digital outputs in a high-impedance state for in-circuit test or evaluation, and low gives normal operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HTCSEMI |
| Package | SSOP-28-208mil |
| Category | Data Acquisition |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage (AVDD) | AVDD | 2.7 | 3 | 5.5 | V | 2 | |
| Operating Voltage (DRVDD) | DRVDD | 2.7 | 3 | 5.5 | V | 2 | |
| Input Voltage Range (AIN) | AIN | -0.5 | V | Maximum printed as AVDD/2 (expression, not numeric) | 2 | ||
| Differential Nonlinearity (SE) | DNL | 0.5 | 1 | LSB | REFT = 1 V, REFB = 0 V | 2 | |
| Integral Nonlinearity (SE) | INL | 1.5 | 2.5 | LSB | 2 | ||
| Zero-Scale Error, Offset Error | EZS | 1.5 | 3.8 | % FS | 2 | ||
| Full-Scale Error, Gain Error | EFS | 3.5 | 5.4 | % FS | 2 | ||
| Power Supply Rejection | PSR | 0.8 | 1.3 | % FS | 2 | ||
| Power Consumption | PD | 215 | 245 | mW | AVDD = DVDD = 3 V | 2 | |
| High Input Voltage | VIH | 2.4 | V | 3 | |||
| Low Input Voltage | VIL | 0.3 | V | 3 | |||
| High Level Output Voltage (DVDD = 3 V) | VOH | 2.88 | V | DVDD = 3 V; IOH = 50 A (printed; micro sign lost in text) | 3 | ||
| Low Level Output Voltage (DVDD = 3 V) | VOL | 0.095 | V | DVDD = 3 V; IOL = 1.5 mA | 3 | ||
| High Level Output Voltage (DVDD = 5 V) | VOH | 4.5 | V | DVDD = 5 V; IOH = 50 A (printed; micro sign lost in text) | 3 | ||
| Low Level Output Voltage (DVDD = 5 V) | VOL | 0.4 | V | DVDD = 5 V; IOL = 1.5 mA | 3 | ||
| AVDD (with respect to AVSS) | -0.3 | 6.5 | V | with respect to AVSS | 4 | ||
| DVDD (with respect to DVSS) | -0.3 | 6.5 | V | with respect to DVSS | 4 | ||
| AVSS (with respect to DVSS) | -0.3 | 0.3 | V | with respect to DVSS | 4 | ||
| AVDD (with respect to DVDD) | -6.5 | 6.5 | V | with respect to DVDD | 4 | ||
| CLK (with respect to AVSS) | -0.3 | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 | |||
| Digital Outputs (with respect to DVSS) | -0.3 | V | with respect to DVSS; max printed as DVDD + 0.3 (expression) | 4 | |||
| AINA, AINB (with respect to AVSS) | -1 | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 | |||
| VREF (with respect to AVSS) | -0.3 | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 | |||
| REFSENSE (with respect to AVSS) | -0.3 | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 | |||
| REFT, REFB (with respect to AVSS) | -0.3 | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 | |||
| Junction Temperature | 150 | C | 4 | ||||
| Storage Temperature | -65 | 150 | C | 4 | |||
| Lead Temperature | 300 | C | 10 sec | 4 |
CAD (KiCad official)
- Symbol:
HT9201ARSZ - Footprint:
Package_SO:SSOP-28_5.3x10.2mm_P0.65mm - 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files:
ht9201arsz-etched.step/ht9201arsz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ht9201arsz.step/ht9201arsz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HTCSEMI datasheet (17 pp, sha256
241b258c73f38974, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HT9201ARSZ
**HTCSEMI** · Analog To Digital Converters (ADC) · SSOP-28-208mil
HT9201ARSZ from HTCSEMI, in a SSOP-28-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVSS | power_in | Digital ground for the logic and output buffers, to be connected close to the ADC with the analog ground in a solid ground plane. |
| 2 | DVDD | power_in | Digital supply for the D0-D9 output buffers, operable from 2.7 V to 5.5 V independently of AVDD. |
| 3 | D0 | output | Bit 0 (LSB) of the straight-binary 10-bit output word, powered from DVDD, with a fan-out of one recommended and load kept below 20 pF. |
| 4 | D1 | output | Bit 1 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 5 | D2 | output | Bit 2 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 6 | D3 | output | Bit 3 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 7 | D4 | output | Bit 4 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 8 | D5 | output | Bit 5 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 9 | D6 | output | Bit 6 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 10 | D7 | output | Bit 7 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 11 | D8 | output | Bit 8 of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 12 | D9 | output | Bit 9 (MSB) of the straight-binary 10-bit output word, powered from DVDD, with load kept below 20 pF. |
| 13 | SELECT | input | Selects the output channel: high presents the I-channel word and low presents the Q-channel word, with the input referenced to AVDD/2 threshold. |
| 14 | CLOCK | input | Sample clock input, internally buffered from AVDD with threshold at AVDD/2, with clock pulse widths high and low of 22.5 ns each for 20 MSPS operation. |
| 15 | SLEEP | input | Power-down control: high powers the device down and low gives normal operation. |
| 16 | INA-I | input | I-channel analog input A, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 17 | INB-I | input | I-channel analog input B, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 18 | REFT-I | passive | Top reference decoupling node for the I channel, to be bypassed with chip capacitors placed close to the converter. |
| 19 | REFB-I | passive | Bottom reference decoupling node for the I channel, to be bypassed with chip capacitors placed close to the converter. |
| 20 | AVSS | power_in | Analog ground for the converters, reference and input buffers, to be joined with DVSS near the ADC. |
| 21 | REFSENSE | input | Reference mode select: tie to VREF for 1 V, to AVSS for 2 V, to AVDD for external reference, or to a divider tap for a programmable 0.7 V to 2.5 V reference. |
| 22 | VREF | power_in | Internal reference output, 1 V or 2 V depending on REFSENSE, which becomes an input when an external reference is applied. |
| 23 | AVDD | power_in | Analog supply, operable from 2.7 V to 5.5 V independently of DVDD, with absolute maximum AVDD to AVSS of -0.3 V to +6.5 V. |
| 24 | REFB-Q | passive | Bottom reference decoupling node for the Q channel, to be bypassed with chip capacitors placed close to the converter. |
| 25 | REFT-Q | passive | Top reference decoupling node for the Q channel, to be bypassed with chip capacitors placed close to the converter. |
| 26 | INB-Q | input | Q-channel analog input B, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 27 | INA-Q | input | Q-channel analog input A, accepting single-ended or differential signals, with an input span of 1 V to 2 V set by the reference mode. |
| 28 | CHIP-SELECT | input | High places the digital outputs in a high-impedance state for in-circuit test or evaluation, and low gives normal operation. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HTCSEMI |
| Package | SSOP-28-208mil |
| Category | Data Acquisition |
| Pins | 28 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage (AVDD) | AVDD | 2.7 | 3 | 5.5 | V | | 2 |
| Operating Voltage (DRVDD) | DRVDD | 2.7 | 3 | 5.5 | V | | 2 |
| Input Voltage Range (AIN) | AIN | -0.5 | | | V | Maximum printed as AVDD/2 (expression, not numeric) | 2 |
| Differential Nonlinearity (SE) | DNL | | 0.5 | 1 | LSB | REFT = 1 V, REFB = 0 V | 2 |
| Integral Nonlinearity (SE) | INL | | 1.5 | 2.5 | LSB | | 2 |
| Zero-Scale Error, Offset Error | EZS | | 1.5 | 3.8 | % FS | | 2 |
| Full-Scale Error, Gain Error | EFS | | 3.5 | 5.4 | % FS | | 2 |
| Power Supply Rejection | PSR | | 0.8 | 1.3 | % FS | | 2 |
| Power Consumption | PD | | 215 | 245 | mW | AVDD = DVDD = 3 V | 2 |
| High Input Voltage | VIH | 2.4 | | | V | | 3 |
| Low Input Voltage | VIL | | | 0.3 | V | | 3 |
| High Level Output Voltage (DVDD = 3 V) | VOH | 2.88 | | | V | DVDD = 3 V; IOH = 50 A (printed; micro sign lost in text) | 3 |
| Low Level Output Voltage (DVDD = 3 V) | VOL | | | 0.095 | V | DVDD = 3 V; IOL = 1.5 mA | 3 |
| High Level Output Voltage (DVDD = 5 V) | VOH | 4.5 | | | V | DVDD = 5 V; IOH = 50 A (printed; micro sign lost in text) | 3 |
| Low Level Output Voltage (DVDD = 5 V) | VOL | | | 0.4 | V | DVDD = 5 V; IOL = 1.5 mA | 3 |
| AVDD (with respect to AVSS) | | -0.3 | | 6.5 | V | with respect to AVSS | 4 |
| DVDD (with respect to DVSS) | | -0.3 | | 6.5 | V | with respect to DVSS | 4 |
| AVSS (with respect to DVSS) | | -0.3 | | 0.3 | V | with respect to DVSS | 4 |
| AVDD (with respect to DVDD) | | -6.5 | | 6.5 | V | with respect to DVDD | 4 |
| CLK (with respect to AVSS) | | -0.3 | | | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 |
| Digital Outputs (with respect to DVSS) | | -0.3 | | | V | with respect to DVSS; max printed as DVDD + 0.3 (expression) | 4 |
| AINA, AINB (with respect to AVSS) | | -1 | | | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 |
| VREF (with respect to AVSS) | | -0.3 | | | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 |
| REFSENSE (with respect to AVSS) | | -0.3 | | | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 |
| REFT, REFB (with respect to AVSS) | | -0.3 | | | V | with respect to AVSS; max printed as AVDD + 0.3 (expression) | 4 |
| Junction Temperature | | | | 150 | C | | 4 |
| Storage Temperature | | -65 | | 150 | C | | 4 |
| Lead Temperature | | | | 300 | C | 10 sec | 4 |
## CAD (KiCad official)
- Symbol: `HT9201ARSZ`
- Footprint: `Package_SO:SSOP-28_5.3x10.2mm_P0.65mm`
- 3D model: SSOP-28-208mil (KiCad packages3D, STEP)
- 3D model files: `ht9201arsz-etched.step` / `ht9201arsz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ht9201arsz.step` / `ht9201arsz.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [HTCSEMI datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835560123592704) (17 pp, sha256 `241b258c73f38974`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ht9201arsz-datasheet.pdf)