component

HT9032D

Public Made by Adom

by adom

lingxingic Telecom Interface ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ht9032d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
viewers ht9032d: viewers · Ray 26d ago
ht9032d-etched.fit.json ht9032d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
ht9032d-etched.glb ht9032d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
ht9032d-etched.step ht9032d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 2d ago
ht9032d.glb Publish 0.1.0 · Ray 26d ago
ht9032d.kicad_mod Publish 0.1.0 · Ray 26d ago
ht9032d.kicad_sym Publish 0.1.0 · Ray 26d ago
ht9032d.lbr Publish 0.1.0 · Ray 26d ago
ht9032d.step Publish 0.1.0 · Ray 26d ago
package.json Publish 0.1.0 · Ray 26d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md ht9032d: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 17d ago

HT9032D

lingxingic · Telecom Interface ICs · SOP-8

HT9032D from lingxingic, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 DOUT output FSK demodulator data output. During normal operation outputs the recovered CID data stream (alternating '0'/'1' marker sequence followed by data); otherwise held high ('1').
2 VDD power_in Internal logic supply. Operating range 3.5 V to 5.5 V (typ 5.0 V). Typical IDD ≈ 3.2 mA active, standby current ≈ 1 µA.
3 TIP input Telephone-line TIP input to the FSK front-end. Internally biased to 1/2 VDD during normal operation; must be DC-isolated (AC coupled) from the telephone line. Differential input impedance ≈ 500 kΩ (TIP,RING).
4 RING input Telephone-line RING input to the FSK front-end. Internally biased to 1/2 VDD during normal operation; must be DC-isolated (AC coupled) from the telephone line.
5 PDWN input Power-down control, Schmitt-trigger input. PDWN = '1' places the circuit in power-saving mode; PDWN = '0' selects normal operation. VIH ≥ 0.8 V, VIL ≤ 0.2·VDD; threshold VT- 2.0-2.6 V, VT+ 2.5-3.0 V at VDD = 5 V.
6 VSS power_in Internal logic ground (0 V reference).
7 X2 output Clock generator oscillator output; the second terminal of the crystal/ceramic resonator. Typical resonator is 3.58 MHz with 10 MΩ feedback and 30 pF load caps.
8 X1 input Clock generator oscillator input; one terminal of the crystal/ceramic resonator, or an external 3.58 MHz clock source injection point.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-8
Category Interface
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • HT9032D (LX)

CAD (KiCad official)

  • Symbol: HT9032D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ht9032d-etched.step / ht9032d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht9032d.step / ht9032d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (13 pp, sha256 a82177d350f5df81, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF