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ht9032d: factory component page (tier=lcsc)

Ray ·38d7d98a45 ·26d ago ·parent c504147
1 file changed +122−8
page.json+122−8
@@ -1,13 +1,132 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ht9032d",+  "title": "HT9032D",+  "brief": "lingxingic Telecom Interface ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "lingxingic Telecom Interface ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "interface",     "ht9032d"   ],+  "component": {+    "mpn": "HT9032D",+    "manufacturer": "lingxingic",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "Interface",+    "subcategory": "Telecom Interface ICs",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603322867585204224",+    "parts": {+      "symbol": "ht9032d.kicad_sym",+      "footprint": "ht9032d.kicad_mod",+      "model_3d": "ht9032d.glb",+      "model_3d_step": "ht9032d.step",+      "lbr": "ht9032d.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "DOUT",+        "type": "output",+        "description": "FSK demodulator data output. During normal operation outputs the recovered CID data stream (alternating '0'/'1' marker sequence followed by data); otherwise held high ('1')."+      },+      {+        "number": "2",+        "name": "VDD",+        "type": "power_in",+        "description": "Internal logic supply. Operating range 3.5 V to 5.5 V (typ 5.0 V). Typical IDD \u2248 3.2 mA active, standby current \u2248 1 \u00b5A."+      },+      {+        "number": "3",+        "name": "TIP",+        "type": "input",+        "description": "Telephone-line TIP input to the FSK front-end. Internally biased to 1/2 VDD during normal operation; must be DC-isolated (AC coupled) from the telephone line. Differential input impedance \u2248 500 k\u03a9 (TIP,RING)."+      },+      {+        "number": "4",+        "name": "RING",+        "type": "input",+        "description": "Telephone-line RING input to the FSK front-end. Internally biased to 1/2 VDD during normal operation; must be DC-isolated (AC coupled) from the telephone line."+      },+      {+        "number": "5",+        "name": "PDWN",+        "type": "input",+        "description": "Power-down control, Schmitt-trigger input. PDWN = '1' places the circuit in power-saving mode; PDWN = '0' selects normal operation. VIH \u2265 0.8 V, VIL \u2264 0.2\u00b7VDD; threshold VT- 2.0-2.6 V, VT+ 2.5-3.0 V at VDD = 5 V."+      },+      {+        "number": "6",+        "name": "VSS",+        "type": "power_in",+        "description": "Internal logic ground (0 V reference)."+      },+      {+        "number": "7",+        "name": "X2",+        "type": "output",+        "description": "Clock generator oscillator output; the second terminal of the crystal/ceramic resonator. Typical resonator is 3.58 MHz with 10 M\u03a9 feedback and 30 pF load caps."+      },+      {+        "number": "8",+        "name": "X1",+        "type": "input",+        "description": "Clock generator oscillator input; one terminal of the crystal/ceramic resonator, or an external 3.58 MHz clock source injection point."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603322867585204224",+        "pages": 13,+        "sha256": "a82177d350f5df81",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "lingxingic",+      "Package": "SOP-8",+      "Category": "Interface",+      "Pins": "8"+    }+  },+  "variants": [+    {+      "mpn": "HT9032D (LX)",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ht9032d"+  ],+  "discovery_pitch": "HT9032D (lingxingic) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +144,5 @@     "docs/ht9032d-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file