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HT8563ANZ

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HTCSEMI Real Time Clocks, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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HT8563ANZ

HTCSEMI · Real Time Clocks · DIP-8

HT8563ANZ from HTCSEMI, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OSCI passive Connection for the 32.768 kHz quartz resonator (internal load capacitance 12 pF), and the input for an external 32.768 kHz oscillator when one is used.
2 OSCO passive Connection for the 32.768 kHz quartz resonator; it is left unconnected when OSCI is driven by an external oscillator.
3 INT output Interrupt output that signals alarm matches or timer countdown to 0, as a continuous or pulsed signal depending on the TI/TP bit; absolute output voltage limit is -0.5 V to 6.5 V.
4 VSS power_in Common ground pin; all voltages are specified relative to this pin.
5 SDA bidirectional Serial data input/output for the double-wire I2C-bus; it is an open-drain output that requires an external pull-up resistor.
6 SCL input Serial clock input for the double-wire bus, with a cycle frequency of 0 to 400 kHz.
7 CLKOUT output Frequency divider output producing 32.768 kHz, 8.192 kHz, 4.096 kHz or 1 Hz when enabled; it is an open-drain output that requires an external pull-up resistor.
8 VDD power_in Supply pin, 1 V to 5.5 V for timekeeping; serial interface access is not guaranteed below 1.8 V.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package DIP-8
Category Clock/Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage (Norm) VDD 1 5.5 V 2
Input voltage SCL, SDA, OSCI (Norm) VI 0 5.5 V 2
Output voltage CLKOUT, INT (Norm) VO 0 5.5 V 2
Operating temperature range TA -40 85 °C 2
Supply voltage (limit permissible) VDD -0.5 6.5 V 2
Dissipated power Ptot 300 mWt 2
Input voltage SCL, SDA, OSCI (limit permissible) VI -0.5 6.5 V 2
Output voltage CLKOUT, INT (limit permissible) VO -0.5 6.5 V 2
Direct input or output current via any pin IIO -10 10 mA 2
Supply voltage, I2C bus active VDD 1.8 5.5 V I2C bus active; FSCL = 400 kHz 2
Supply voltage, non-active mode VDD 1 5.5 V in the non-active mode; Remarks 1,2 2
Input leakage current ILI 1 µA VIN =VDD; VIN =VSS 2
Output leakage current ILO 1 µA VOUT =VDD; VOUT =VSS 2
Consumption current IDD1 800 µA CLKOUT-off, FSCL =400 kHz 2
Consumption current IDD1 200 µA CLKOUT-off, FSCL =100 kHz 2
Consumption current IDD1 0.55 µA CLKOUT-off, FSCL =0 kHz, VDD=5V; Remarks 1,2 2
Consumption current IDD1 0.45 µA CLKOUT-off, FSCL =0 kHz, VDD=2V; Remarks 1,2 2
Low level output current at pin CLKOUT IOL1 1 mA VOL = 0.4 V, VDD =5 V 2
High level output current at pin CLKOUT IOH1 1 mA VOH = 4.6 V, VDD =5 V 2
Low level output current at pin INT IOL2 1 mA VOL = 0.4 V, VDD =5 V 2
Low level output current at pin SDA IOL3 3 mA VOL = 0.4 V, VDD =5 V 3
Supply low level, detected by the circuit VLOW 1 V Remark 1: Ta=(25 ± 5)°C 3
Cycle frequency SCL fSCL 0 400 kHz VCC = 4.5-5.5 V, TA = -40...+85°C 3
Bus vacant time between STOP and START tBUF 4.7 usec 3
Hold time (repeated) of START condition tHD:STA 0.6 usec Remark 1 (after this interval the first cycle signal is formed) 3
Low condition duration of SCL pulse tLOW 1.3 usec 3
High condition duration of SCL pulse tHIGH 0.6 usec 3
Presetting time for repeated START condition tSU:STA 0.6 usec 3
Data hold time tHD:DAT 0 usec Remark 2 (device internally ensures at least 300 nsec on SDA) 3
Data presetting time tSU:DAT 100 nsec 3
Rise time for signals SDA and SCL tR 300 nsec 3
Drop time for signals SDA and SCL tF 300 nsec 3
Presetting time for the condition STOP tSU:STO 0.6 usec 3
Total capacitance load on each bus line CB 400 pF 3
Capacity input/output CI/O 10 10 pF 3
Load capacitance of the quartz resonator CLX 12.5 12.5 pF 3

CAD (KiCad official)

  • Symbol: HT8563ANZ
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: ht8563anz-etched.step / ht8563anz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht8563anz.step / ht8563anz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (11 pp, sha256 f84e780cf3796e05, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF