component
HT85163ARZ
Public Made by Adomby adom
HTCSEMI Real Time Clocks, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
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| docs | 7d ago |
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| ht85163arz-etched.glb | 7d ago |
| ht85163arz-etched.step | 7d ago |
| ht85163arz-hero.glb | 7d ago |
| ht85163arz-hero.overlay.json | 7d ago |
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HT85163ARZ
HTCSEMI · Real Time Clocks · SOP-8
HT85163ARZ from HTCSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OSCI | input | Input for the 32.768 kHz quartz resonator (internal load capacitance 12 pF), which can also be driven by an external 32.768 kHz oscillator signal. |
| 2 | OSCO | output | Output for the 32.768 kHz quartz resonator connection (internal load capacitance 12 pF), left unconnected when OSCI is driven by an external oscillator. |
| 3 | INT | output | Interruption output that is driven by an alarm match or by the timer countdown reaching 0; the alarm interruption is continuous, while the timer interruption can be continuous or pulsed depending on the TI/TP bit. |
| 4 | VSS | power_in | Common ground pin; all voltages on the device are specified relative to this pin. |
| 5 | SDA | bidirectional | Serial data input/output of the double-wire I2C-bus interface, configured as an open drain that requires an external pull-up resistor. |
| 6 | SCL | input | Serial clock input used to synchronize data transfer on the double-wire bus, with a cycle frequency of 0 to 400 kHz. |
| 7 | CLKOUT | output | Frequency divider output configured as an open drain that requires an external pull-up resistor, enabled by the FE bit and selected by the FD bits. |
| 8 | VDD | power_in | Supply pin rated from 1 V to 5.5 V (absolute maximum 6.5 V); interface access is not guaranteed below 1.8 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HTCSEMI |
| Package | SOP-8 |
| Category | Clock/Timing |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (norm, recommended) | VDD | 1 | 5.5 | V | 3 | ||
| Input voltage SCL, SDA, OSCI (norm) | VI | 0 | 5.5 | V | 3 | ||
| Output voltage CLKOUT, INT (norm) | VO | 0 | 5.5 | V | 3 | ||
| Operating temperature range | TA | -40 | 85 | °C | 3 | ||
| Supply voltage (permissible limit) | VDD | -0.5 | 6.5 | V | 3 | ||
| Input voltage SCL, SDA, OSCI (permissible limit) | VI | -0.5 | 6.5 | V | 3 | ||
| Output voltage CLKOUT, INT (permissible limit) | VO | -0.5 | 6.5 | V | 3 | ||
| Dissipated power | Ptot | 300 | mWt | 3 | |||
| Direct input or output current via any pin | IIO | -10 | 10 | mA | 3 | ||
| Supply voltage, I2C bus active | VDD | 1.8 | 5.5 | V | I2C bus active; FSCL = 400 kHz | 3 | |
| Supply voltage, non-active mode | VDD | 1 | 5.5 | V | in the non-active mode | 3 | |
| Input leakage current | ILI | 1 | µA | VIN =VDD; VIN =VSS | 3 | ||
| Output leakage current | ILO | 1 | µA | VOUT =VDD; VOUT =VSS | 3 | ||
| Consumption current, CLKOUT off, FSCL 400 kHz | IDD1 | 800 | µA | CLKOUT-off, FSCL =400 kHz | 3 | ||
| Consumption current, CLKOUT off, FSCL 100 kHz | IDD1 | 200 | µA | CLKOUT-off, FSCL =100 kHz | 3 | ||
| Consumption current, CLKOUT off, FSCL 0 kHz, VDD 5 V | IDD1 | 0.55 | µA | CLKOUT-off, FSCL =0 kHz, VDD=5V | 3 | ||
| Consumption current, CLKOUT off, FSCL 0 kHz, VDD 2 V | IDD1 | 0.45 | µA | CLKOUT-off, FSCL =0 kHz, VDD=2V | 3 | ||
| Low level output current at pin CLKOUT | IOL1 | 1 | mA | VOL = 0.4 V, VDD =5 V | 3 | ||
| High level output current at pin CLKOUT | IOH1 | 1 | mA | VOH = 4.6 V, VDD =5 V | 3 | ||
| Low level output current at pin INT | IOL2 | 1 | mA | VOL = 0.4 V, VDD =5 V | 3 | ||
| Low level output current at pin SDA | IOL3 | 3 | mA | VOL = 0.4 V, VDD =5 V | 4 | ||
| Supply low level, detected by the circuit | VLOW | 1 | V | Ta=(25 ± 5)°C (footnote 1) | 4 | ||
| Cycle frequency SCL | fSCL | 0 | 400 | kHz | 4 | ||
| Bus vacant time between STOP and START | tBUF | 4.7 | usec | 4 | |||
| Hold time (repeated) of the condition START | tHD:STA | 0.6 | usec | 4 | |||
| Low condition duration of the SCL pulse | tLOW | 1.3 | usec | 4 | |||
| High condition duration of the SCL pulse | tHIGH | 0.6 | usec | 4 | |||
| Presetting time for the repeated condition START | tSU:STA | 0.6 | usec | 4 | |||
| Data hold time | tHD:DAT | 0 | usec | 4 | |||
| Data presetting time | tSU:DAT | 100 | nsec | 4 | |||
| Rise time for signals SDA and SCL | tR | 300 | nsec | 4 | |||
| Drop time for signals SDA and SCL | tF | 300 | nsec | 4 | |||
| Presetting time for the condition STOP | tSU:STO | 0.6 | usec | 4 | |||
| Total capacitance load on each bus line | CB | 400 | pF | 4 | |||
| Capacity input/output | CI/O | 10 | 10 | pF | 4 | ||
| Load capacitance of the quartz resonator | CLX | 12.5 | 12.5 | pF | 4 |
CAD (KiCad official)
- Symbol:
HT85163ARZ - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ht85163arz-etched.step/ht85163arz-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ht85163arz.step/ht85163arz.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HTCSEMI datasheet (13 pp, sha256
6828edcb07bbb452, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).