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HT8483EARZ

Public Made by Adom

by adom

HTCSEMI RS-485/RS-422 ICs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Contents

README

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HT8483EARZ

HTCSEMI · RS-485/RS-422 ICs · SOP-8

HT8483EARZ from HTCSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output, three-state; high when A-B ≥ +0.2V or inputs open, low when A-B ≤ -0.2V, high-impedance when RE is high.
2 RE input Receiver output enable, active low (RE = 0 enables RO, RE = 1 puts RO in high impedance); input high threshold 2.0V, low 0.8V.
3 DE input Driver output enable, active high (DE = 1 enables driver outputs, DE = 0 puts them in high impedance); input high threshold 2.0V, low 0.8V.
4 DI input Driver input; with DE high, a low on DI forces the non-inverting output low and a high forces it high; input range -0.5V to (VCC+0.5V).
5 GND power_in Ground, reference for all device voltages.
6 A bidirectional Noninverting receiver input and driver output on the RS-485/RS-422 bus; -7V to +12V common-mode range, ±15kV HBM ESD protected.
7 B bidirectional Inverting receiver input and driver output on the RS-485/RS-422 bus; -7V to +12V common-mode range, ±15kV HBM ESD protected.
8 VCC power_in Supply voltage input, 5V ±5% operating, absolute maximum 12V.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package SOP-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 12 V 1
Driver Output Voltage (A, B) -8 12.5 V 1
Receiver Input Voltage (A, B) -8 12.5 V 1
Continuous Power Dissipation, 8-Pin SO 471 mW derate 5.88mW/°C 1
Operating Temperature Range -40 85 °C 1
Storage Temperature Range -65 160 °C 1
Lead Temperature 300 °C soldering, 10sec 1
Differential Driver Output (with load) VOD2 2 V R = 50Ω (RS-422) 2
Differential Driver Output (with load) VOD2 1.5 5 V R = 27Ω (RS-485), Figure 4 2
Differential Driver Output (no load) VOD1 5 V 2
Change in Magnitude of Driver Differential Output Voltage ∆VOD 0.2 V R = 27Ω or 50Ω, Figure 4 2
Driver Common-Mode Output Voltage VOC 3 V R = 27Ω or 50Ω, Figure 4 2
Change in Magnitude of Driver Common-Mode Output Voltage ∆VOC 0.2 V R = 27Ω or 50Ω, Figure 4 2
Input High Voltage VIH 2 V DE, DI, RE 2
Input Low Voltage VIL 0.8 V DE, DI, RE 2
Input Current IIN1 -2 2 µA DE, DI, RE 2
Input Current (A, B) IIN2 1 mA DE = 0V; VIN = 12V 2
Input Current (A, B) IIN2 -0.8 mA VCC = 0V or 5.25V, VIN = -7V 2
Receiver Differential Threshold Voltage VTH -0.2 0.2 V -7V ≤ VCM ≤12V 2
Receiver Input Hysteresis ∆VTH 70 mV VCM = 0V 2
Receiver Output High Voltage VOH 3.5 V IO = -4mA, VID = 200mV 2
Receiver Output Low Voltage VOL 0.4 V IO = 4mA, VID = -200mV 2
Three-State Output Current at Receiver IOZR -1 1 µA 0.4V ≤ VO ≤ 2.4V 2
No-Load Supply Current ICC 500 900 µA DE = VCC 2
No-Load Supply Current ICC 300 500 µA DE = 0V 2
Driver Short-Circuit Current, VO = High IOSD1 35 250 mA -7V ≤ VO ≤ 12V (Note 4) 2
Driver Short-Circuit Current, VO = Low IOSD2 35 250 mA -7V ≤ VO ≤12V (Note 4) 2
Receiver Short-Circuit Current IOSR 7 95 mA 0V ≤ VO ≤ VCC 2
Driver Input to Output tPLH tPLH 10 30 60 ns RDIFF = 54, CL1 = CL2 = 100pF 3
Driver Input to Output tPHL tPHL 10 30 60 ns RDIFF = 54, CL1 = CL2 = 100pF 3
Driver Output Skew to Output tSKEW 5 10 ns RDIFF = 54, CL1 = CL2 = 100pF 3
Driver Enable to Output High tZH 40 70 ns CL= 100pF, S2 closed 3
Driver Enable to Output Low tZL 40 70 ns CL= 100pF, S1 closed 3
Driver Disable Time from Low tLZ 40 70 ns CL= 15pF, S1 closed 3
Driver Disable Time from High tHZ 40 70 ns CL= 15pF, S2 closed 3
Receiver Skew /tPLH - tPHL/ tSKD 13 ns RDIFF = 54, CL1 = CL2 = 100pF 3
Receiver Enable to Output Low tZL 20 50 ns CRL = 15pF, S1 closed 3
Receiver Enable to Output High tZH 20 50 ns CRL = 15pF, S2 closed 3
Receiver Disable Time from Low tLZ 20 50 ns CRL = 15pF, S1 closed 3
Receiver Disable Time from High tHZ 20 50 ns CRL = 15pF, S2 closed 3
Maximum Data Rate fMAX 2.5 Mbps 3

CAD (KiCad official)

  • Symbol: HT8483EARZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ht8483earz-etched.step / ht8483earz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht8483earz.step / ht8483earz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (5 pp, sha256 8a0639739afb5f6f, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF