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HT8051ARTZ

HTCSEMI · Comparators · SOT-23-5

HT8051ARTZ from HTCSEMI, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Comparator output: pulled to VDD when high and to GND when low, with rail-to-rail CMOS/TTL-compatible swing.
2 GND power_in Ground pin, to be connected to the most negative supply; all GND pads are connected on die.
3 VINP input DC-coupled input pad, labelled as a video signal input in the pad table.
4 VINN input DC reference voltage input pad.
5 VDD power_in Positive power supply pin; the recommended operating range is 2.7 V to 5.5 V per Table 2, although the pad table labels it 3.3 V/5 V.

Key specifications

Parameter Value
Manufacturer HTCSEMI
Package SOT-23-5
Category Amplifiers/Comparators
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply (absolute maximum) VDD 5.5 V 2
Operating ambient temperature range (absolute maximum) TA -40 85 ℃ 2
Storage temperature TSTG -65 150 ℃ 2
Power supply (recommended operating) VDD 2.7 5.5 V 2
Operating ambient temperature range (recommended operating) TA -40 85 ℃ 2
Operating supply voltage VCC 2.7 3.3 5.5 V Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Input offset voltage VOS -5 0.15 5 mV Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Input offset voltage temp drift VOS_TC 0.64 1.96 4.7 uV/℃ Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Input hysteresis voltage Vhyst 4 5 10.8 mV Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Input hysteresis voltage temp drift Vhyst_TC 4.8 5.4 uV/℃ Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Input resistance RIN 100 GΩ Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Quiescent current IQ 200 uA Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Output short to VDD ISC 25 mA Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Common mode rejection ratio CMRR 70 dB Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Power supply rejection ratio PSRR 63 dB Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Rising time tR 35 ns Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Falling time tF 28 ns Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Propagation delay (low to high) TPD+ 140 ns Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3
Propagation delay (high to low) TPD- 135 ns Table 3 header: VDD=+2.7V~+5.5V, Vin+=VDD, Vin-=1.2V, RL=10Kohm, CL=15pF, tt corner, T=30 ºC 3

CAD (KiCad official)

  • Symbol: HT8051ARTZ
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ht8051artz-etched.step / ht8051artz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht8051artz.step / ht8051artz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HTCSEMI datasheet (6 pp, sha256 eb502e448d56433a, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF