component
HT7627S
Public Made by Adomby adom
钜泉光电 Energy Metering, LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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HT7627S
钜泉光电 · Energy Metering · LQFP-64(10x10)
HT7627S from 钜泉光电, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OSCI | input | 32 kHz external clock input for the low-frequency oscillator, used with the external 32.768 kHz crystal. |
| 2 | AGND1 | power_in | Chip analog ground. |
| 3 | VRTC | power_in | RTC/clock power supply input (VRTC domain, 2 to 5.5 V); requires external filter capacitors of 1 uF and 0.1 uF. |
| 4 | PJ.0 | bidirectional | Port J bit 0 in the VRTC domain, STAMP0 RTC time-stamp input with 2 us input filter; GPIO drive is 1.5 mA source and sink, high-impedance by default. |
| 5 | EMU2P8 | power_out | Analog EMU 2.8 V power output; requires external 10 uF and 0.1 uF filter capacitors. |
| 6 | IAP | input | Current channel A analog signal input, positive; ADC full-scale is +/-930 mVp for the current channels. |
| 7 | IAN | input | Current channel A analog signal input, negative; ADC full-scale is +/-930 mVp for the current channels. |
| 8 | VREF | power_in | Metering reference voltage output; requires external filter capacitors of 0.1 uF and 1 uF. |
| 9 | IBP | input | Current channel B analog signal input, positive; ADC full-scale is +/-930 mVp for the current channels. |
| 10 | IBN | input | Current channel B analog signal input, negative; ADC full-scale is +/-930 mVp for the current channels. |
| 11 | AGND2 | power_in | Chip analog ground. |
| 12 | ICP | input | Current channel C analog signal input, positive; ADC full-scale is +/-930 mVp for the current channels. |
| 13 | ICN | input | Current channel C analog signal input, negative; ADC full-scale is +/-930 mVp for the current channels. |
| 14 | AGND3 | power_in | Chip analog ground. |
| 15 | INP | input | Current-channel analog signal input, positive; the datasheet gives a +/-1080 mVp ADC full-scale for the In (neutral-current) channel. |
| 16 | INN | input | Current-channel analog signal input, negative; the datasheet gives a +/-1080 mVp ADC full-scale for the In (neutral-current) channel. |
| 17 | VAP | input | Voltage channel A analog signal input, positive; ADC full-scale is +/-930 mVp for voltage channels. |
| 18 | VAN | input | Voltage channel A analog signal input, negative; ADC full-scale is +/-930 mVp for voltage channels. |
| 19 | VBP | input | Voltage channel B analog signal input, positive; ADC full-scale is +/-930 mVp for voltage channels. |
| 20 | VBN | input | Voltage channel B analog signal input, negative; ADC full-scale is +/-930 mVp for voltage channels. |
| 21 | VCP | input | Voltage channel C analog signal input, positive; ADC full-scale is +/-930 mVp for voltage channels. |
| 22 | VCN | input | Voltage channel C analog signal input, negative; ADC full-scale is +/-930 mVp for voltage channels. |
| 23 | DVCC | power_in | Chip digital power supply input; requires external filter capacitors of 10 uF and 0.1 uF. |
| 24 | DGND | power_in | Chip digital ground. |
| 25 | PA.12 | bidirectional | Port A bit 12, external interrupt INT4 (AFCFG=0) or ADC input channel 0 ADCIN0 (AFCFG=1). |
| 26 | PA.13 | bidirectional | Port A bit 13, external interrupt INT5 (AFCFG=0) or ADC input channel 1 ADCIN1 (AFCFG=1). |
| 27 | PG.5 | bidirectional | Port G bit 5, external low-voltage detect input LVDIN1 (analog) or PWM main output / capture input / event input TMR0. |
| 28 | PG.6 | bidirectional | Port G bit 6, SPI1 chip select (SPI1_CS). |
| 29 | PG.7 | bidirectional | Port G bit 7, SPI1 clock (SPI1_CLK). |
| 30 | PG.8 | bidirectional | Port G bit 8, SPI1 master-in/slave-out (SPI1_MISO) or UART1 transmit (TX1). |
| 31 | PG.9 | bidirectional | Port G bit 9, SPI1 master-out/slave-in (SPI1_MOSI) or UART1 receive (RX1). |
| 32 | PE.1 | bidirectional | Port E bit 1, UART4 transmit (TX4) or RTC second-clock output TOUT2. |
| 33 | PE.2 | bidirectional | Port E bit 2, UART4 receive (RX4) or 7816_0 IO, with 2 us input filter. |
| 34 | PD.8 | bidirectional | Port D bit 8, SPI3 chip select (SPI3_CS). |
| 35 | PB.1 | bidirectional | Port B bit 1, energy metering pulse output 1 (PFOUT1). |
| 36 | PB.2 | bidirectional | Port B bit 2, energy metering pulse output 2 (PFOUT2) or external interrupt INT9. |
| 37 | PB.3 | bidirectional | Port B bit 3, energy metering pulse output 3 (PFOUT3) or RTC second-clock output TOUT3. |
| 38 | PC.4 | bidirectional | Port C bit 4, SPI0 master-out/slave-in (SPI0_MOSI) or UART5 receive (RX5); TTL input, 5 V tolerant, 2 us input filter. |
| 39 | PC.5 | bidirectional | Port C bit 5, SPI0 master-in/slave-out (SPI0_MISO) or UART5 transmit (TX5); TTL input, 5 V tolerant. |
| 40 | PC.6 | bidirectional | Port C bit 6, SPI0 clock (SPI0_CLK); TTL input, 5 V tolerant. |
| 41 | PC.7 | bidirectional | Port C bit 7, SPI0 chip select (SPI0_CS); TTL input, 5 V tolerant. |
| 42 | PC.8 | bidirectional | Port C bit 8, RTC second-clock output 1 (TOUT1) or external interrupt INT2. |
| 43 | PC.13 | bidirectional | Port C bit 13, I2C clock (SCL) or external interrupt INT3; TTL input, 5 V tolerant. |
| 44 | PC.14 | bidirectional | Port C bit 14, I2C data (SDA) or PWM main output / capture input / event input TMR3; TTL input, 5 V tolerant. |
| 45 | PA.0 | bidirectional | Port A bit 0, SPI2 chip select (SPI2_CS) or PWM main output / capture input / event input TMR1. |
| 46 | PA.1 | bidirectional | Port A bit 1, SPI2 clock (SPI2_CLK) or PWM output / capture input / event input TMR4. |
| 47 | PA.2 | bidirectional | Port A bit 2, SPI2 master-in/slave-out (SPI2_MISO) or UART3 receive (RX3). |
| 48 | PA.3 | bidirectional | Port A bit 3, SPI2 master-out/slave-in (SPI2_MOSI) or UART3 transmit (TX3). |
| 49 | PA.5 | bidirectional | Port A bit 5, energy metering pulse output 0 (PFOUT0) or external interrupt INT8, with 2 us input filter. |
| 50 | PA.6 | bidirectional | Port A bit 6, external interrupt INT1; when TEST=0 this pin is fixed as the JTAGWDTEN function, and it supports high-current drive. |
| 51 | PE.3 | bidirectional | Port E bit 3, clock output CLKOUT or energy metering pulse output 4 (PFOUT4); TTL input. |
| 52 | PE.7 | bidirectional | Port E bit 7, external low-voltage detect input LVDIN0 (analog) or ADC input channel 5 (ADCIN5). |
| 53 | PB.13 | bidirectional | Port B bit 13, UART6 transmit (TX6) or SWD data I/O (SWIO); default function is SWIO. |
| 54 | PB.15 | bidirectional | Port B bit 15, UART6 receive (RX6) or SWD clock (SWCLK); default function is SWCLK. |
| 55 | TEST | input | Test pin, active low, with internal 10 kOhm pull-up and 2 us filter. |
| 56 | /RST | input | Reset input, active low, with internal approximately 88 kOhm pull-up and 2 us filter. |
| 57 | VDD1P5 | power_out | Internal digital 1.5 V output; requires external 0.1 uF filter capacitor. |
| 58 | DGND | power_in | Chip digital ground. |
| 59 | DVCC | power_in | Chip digital power supply input; requires external filter capacitors of 10 uF and 0.1 uF. |
| 60 | VTP3 | input | Temperature-sensing terminal channel 3 (TBS input). |
| 61 | VTP2 | input | Temperature-sensing terminal channel 2 (TBS input). |
| 62 | VTP1 | input | Temperature-sensing terminal channel 1 (TBS input). |
| 63 | VTP0 | input | Temperature-sensing terminal channel 0 (TBS input). |
| 64 | OSCO | output | 32 kHz external clock output, associated with the OSCI 32K oscillator pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 钜泉光电 |
| Package | LQFP-64(10x10) |
| Category | Data Acquisition |
| Pins | 64 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电源 VCC (绝对最大额定) | VCC | 2 | 5.5 | V | 输入电源引脚上的电压 | 535 | |
| 输入电压 (数字引脚) | Vi | -0.3 | V | 所有的数字引脚 | 535 | ||
| ADC 输入极限电压 | Via | -0.3 | 3 | V | 测试 ADC 引脚输入电压,高于此电压可能会导致该引脚损坏 | 535 | |
| ADCBAT 输入极限电压 | Vib | -0.3 | 5 | V | 测试 ADCBAT 引脚输入电压,高于此电压可能会导致该引脚损坏 | 535 | |
| 存储温度 | Tstg | -65 | 150 | ℃ | 芯片的极限存储温度 | 535 | |
| 静态 ESD (HBM) | VESDhbm | -4000 | 4000 | V | 芯片所有的引脚 | 535 | |
| MM 静态 ESD | VESDmm | 400 | V | 535 | |||
| 输入电流 (VCC 电源引脚) | Idd | 50 | mA | VCC 电源引脚 | 535 | ||
| 地上电流 (所有 GND 引脚) | Iss | 50 | mA | 所有 GND 引脚 | 535 | ||
| LRC 功耗 | Ilrc | 0.4 | 0.5 | 0.6 | uA | -45℃~85℃,VCC=5.0V | 535 |
| Flash 操作温度 | -40 | 105 | ℃ | 537 | |||
| 输入电源 VCC (BOR 关闭) | VCC | 2 | 3.3 | 5.5 | V | 输入电源引脚上的电压,BOR 关闭 | 537 |
| 输入电源 VCC (BOR 开启) | VCC | 2 | 3.3 | 5.5 | V | 输入电源引脚上的电压,BOR 开启 | 537 |
| OSC 工作电压 | 1.5 | 5.5 | V | 工作温度-40℃~85℃ | 538 | ||
| PLL 工作电压 | 1.5 | 5.5 | V | 工作温度-40℃~85℃ | 538 | ||
| HRC 工作电压 | 2 | 5.5 | V | 工作温度-40℃~85℃ | 538 | ||
| 内部低频 RC 时钟频率 (Flrc) | Flrc | 20 | 32 | 60 | KHz | 工作温度-40℃~85℃ | 538 |
| LRC 工作电压 | 1.5 | 5.5 | V | 工作温度-40℃~85℃ | 539 | ||
| LBOR 复位阈值 上电翻转电压 | 1.769 | 2.1 | V | 539 | |||
| LBOR 复位阈值 下点翻转电压 | 1.2 | 1.648 | 1.95 | V | 539 | ||
| VCC 检测模块功耗 | Ivccdet | 17 | uA | 常温,VCC=5.0V | 535 | ||
| BOR 检测模块功耗 | Ibor | 6.8 | uA | 常温,VCC=5.0V | 535 | ||
| LVDIN 检测模块功耗 | Ilvdin | 5.6 | uA | 常温,VCC=5.0V,单个通道开启 | 535 | ||
| HRC 功耗 | Ihrc | 129 | uA | 常温,VCC=5.0V | 535 | ||
| PLL 功耗 | Ipll | 246 | uA | 常温,VCC=5.0V | 535 | ||
| RTC 功耗(包括 TPS 分时) | Irtc | 1.3 | uA | 535 | |||
| Hold 功耗 | Ihold | 11.1 | uA | 536 | |||
| Sleep 功耗 | Isleep | 3.7 | uA | 536 | |||
| Crystal32k 下运行功耗 | Irunosc | 700 | nA | 536 | |||
| Flash 字节读取时间 | 40 | ns | 536 | ||||
| Flash 字节写时间 | 20 | us | 536 | ||||
| Flash 页擦除时间 | 2 | ms | 536 | ||||
| Flash 全擦除时间 | 10 | ms | 536 | ||||
| 大电流 IO 高电平输出电流 (Ioh1) | Ioh1 | 12 | mA | VCC=5V,I/O 口上输出高电压 Voh 降低到 0.9VCC,测试引脚为支持 source 大电流驱动的 IO | 537 | ||
| 高电平输出电流 (Ioh2) | Ioh2 | 5 | mA | VCC=5.0V,I/O 口上输出高电压 Voh 降低到 0.9VCC,除支持 source 大电流驱动 GPIO 及 PJx 以外的所有 GPIO 引脚 | 537 | ||
| 大电流 IO 低电平输出电流 (Iol1) | Iol1 | 30 | mA | VCC=5.0V,I/O 口上输出低电压 Vol 升高到 0.1VCC,测试引脚为支持大电流驱动的所有 GPIO 引脚 | 537 | ||
| 低电平输出电流 (Iol2) | Iol2 | 5 | mA | VCC=5.0V,I/O 口上输出低电压 Vol 降低到 0.1VCC,除支持大电流驱动的 GPIO 及 PJx 以外的所有 GPIO 引脚 | 537 | ||
| 输入上拉电阻 | Rpull | 88 | kΩ | VCC=5.0V,除 test 其余 GPIO 引脚 | 538 | ||
| 输入上拉电阻 (test 引脚) | Rpull | 10 | kΩ | VCC=5.0V,test 引脚 | 538 | ||
| 输入漏电流 | Iif | 0.1 | uA | IO 配置为输入,上拉关闭,引脚接 VCC 或 GND | 538 | ||
| 开漏输出漏电流 | Iod | 0.1 | uA | IO 配置为输出高,开漏开启,引脚接 GND | 538 | ||
| C-C jitter (PLL) | 469 | ps | 常温 | 538 | |||
| PLL 环路倍频比 | 1344 | 538 | |||||
| 外部 32.768K 晶体时钟频率 (Fosc) | Fosc | 32.768 | KHz | *1 内封晶体类芯片,晶体型号 SC-32S | 538 | ||
| Fosc 起振时间 | 500 | ms | 538 | ||||
| OSC 模块功耗 | 0.7 | uA | 538 | ||||
| 内部高频 RC 时钟频率 (Fhrc) | Fhrc | 20 | MHz | 538 | |||
| HRC C-C jitter | 140 | ps | 常温 | 538 | |||
| HRC 起振时间 | 1.15 | ms | 538 | ||||
| HRC 模块功耗 | 129.5 | uA | 538 | ||||
| LRC 起振时间 | 41.15 | us | 539 | ||||
| LRC 模块功耗 | 0.5 | uA | 539 | ||||
| POR 上电复位阈值 | 1 | V | 539 | ||||
| 最慢上电速率 | 1 | V/ms | 539 | ||||
| 最快上电速率 | 14 | V/ms | 539 | ||||
| LBOR 迟滞电压 | 124 | mV | 539 | ||||
| LBOR 功耗 | 150 | nA | 539 |
CAD (KiCad official)
- Symbol:
HT7627S - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
ht7627s-etched.step/ht7627s-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ht7627s.step/ht7627s.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: 钜泉光电 datasheet (547 pp, sha256
d64ac5e0798c99d9, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# HT7627S
**钜泉光电** · Energy Metering · LQFP-64(10x10)
HT7627S from 钜泉光电, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OSCI | input | 32 kHz external clock input for the low-frequency oscillator, used with the external 32.768 kHz crystal. |
| 2 | AGND1 | power_in | Chip analog ground. |
| 3 | VRTC | power_in | RTC/clock power supply input (VRTC domain, 2 to 5.5 V); requires external filter capacitors of 1 uF and 0.1 uF. |
| 4 | PJ.0 | bidirectional | Port J bit 0 in the VRTC domain, STAMP0 RTC time-stamp input with 2 us input filter; GPIO drive is 1.5 mA source and sink, high-impedance by default. |
| 5 | EMU2P8 | power_out | Analog EMU 2.8 V power output; requires external 10 uF and 0.1 uF filter capacitors. |
| 6 | IAP | input | Current channel A analog signal input, positive; ADC full-scale is +/-930 mVp for the current channels. |
| 7 | IAN | input | Current channel A analog signal input, negative; ADC full-scale is +/-930 mVp for the current channels. |
| 8 | VREF | power_in | Metering reference voltage output; requires external filter capacitors of 0.1 uF and 1 uF. |
| 9 | IBP | input | Current channel B analog signal input, positive; ADC full-scale is +/-930 mVp for the current channels. |
| 10 | IBN | input | Current channel B analog signal input, negative; ADC full-scale is +/-930 mVp for the current channels. |
| 11 | AGND2 | power_in | Chip analog ground. |
| 12 | ICP | input | Current channel C analog signal input, positive; ADC full-scale is +/-930 mVp for the current channels. |
| 13 | ICN | input | Current channel C analog signal input, negative; ADC full-scale is +/-930 mVp for the current channels. |
| 14 | AGND3 | power_in | Chip analog ground. |
| 15 | INP | input | Current-channel analog signal input, positive; the datasheet gives a +/-1080 mVp ADC full-scale for the In (neutral-current) channel. |
| 16 | INN | input | Current-channel analog signal input, negative; the datasheet gives a +/-1080 mVp ADC full-scale for the In (neutral-current) channel. |
| 17 | VAP | input | Voltage channel A analog signal input, positive; ADC full-scale is +/-930 mVp for voltage channels. |
| 18 | VAN | input | Voltage channel A analog signal input, negative; ADC full-scale is +/-930 mVp for voltage channels. |
| 19 | VBP | input | Voltage channel B analog signal input, positive; ADC full-scale is +/-930 mVp for voltage channels. |
| 20 | VBN | input | Voltage channel B analog signal input, negative; ADC full-scale is +/-930 mVp for voltage channels. |
| 21 | VCP | input | Voltage channel C analog signal input, positive; ADC full-scale is +/-930 mVp for voltage channels. |
| 22 | VCN | input | Voltage channel C analog signal input, negative; ADC full-scale is +/-930 mVp for voltage channels. |
| 23 | DVCC | power_in | Chip digital power supply input; requires external filter capacitors of 10 uF and 0.1 uF. |
| 24 | DGND | power_in | Chip digital ground. |
| 25 | PA.12 | bidirectional | Port A bit 12, external interrupt INT4 (AFCFG=0) or ADC input channel 0 ADCIN0 (AFCFG=1). |
| 26 | PA.13 | bidirectional | Port A bit 13, external interrupt INT5 (AFCFG=0) or ADC input channel 1 ADCIN1 (AFCFG=1). |
| 27 | PG.5 | bidirectional | Port G bit 5, external low-voltage detect input LVDIN1 (analog) or PWM main output / capture input / event input TMR0. |
| 28 | PG.6 | bidirectional | Port G bit 6, SPI1 chip select (SPI1_CS). |
| 29 | PG.7 | bidirectional | Port G bit 7, SPI1 clock (SPI1_CLK). |
| 30 | PG.8 | bidirectional | Port G bit 8, SPI1 master-in/slave-out (SPI1_MISO) or UART1 transmit (TX1). |
| 31 | PG.9 | bidirectional | Port G bit 9, SPI1 master-out/slave-in (SPI1_MOSI) or UART1 receive (RX1). |
| 32 | PE.1 | bidirectional | Port E bit 1, UART4 transmit (TX4) or RTC second-clock output TOUT2. |
| 33 | PE.2 | bidirectional | Port E bit 2, UART4 receive (RX4) or 7816_0 IO, with 2 us input filter. |
| 34 | PD.8 | bidirectional | Port D bit 8, SPI3 chip select (SPI3_CS). |
| 35 | PB.1 | bidirectional | Port B bit 1, energy metering pulse output 1 (PFOUT1). |
| 36 | PB.2 | bidirectional | Port B bit 2, energy metering pulse output 2 (PFOUT2) or external interrupt INT9. |
| 37 | PB.3 | bidirectional | Port B bit 3, energy metering pulse output 3 (PFOUT3) or RTC second-clock output TOUT3. |
| 38 | PC.4 | bidirectional | Port C bit 4, SPI0 master-out/slave-in (SPI0_MOSI) or UART5 receive (RX5); TTL input, 5 V tolerant, 2 us input filter. |
| 39 | PC.5 | bidirectional | Port C bit 5, SPI0 master-in/slave-out (SPI0_MISO) or UART5 transmit (TX5); TTL input, 5 V tolerant. |
| 40 | PC.6 | bidirectional | Port C bit 6, SPI0 clock (SPI0_CLK); TTL input, 5 V tolerant. |
| 41 | PC.7 | bidirectional | Port C bit 7, SPI0 chip select (SPI0_CS); TTL input, 5 V tolerant. |
| 42 | PC.8 | bidirectional | Port C bit 8, RTC second-clock output 1 (TOUT1) or external interrupt INT2. |
| 43 | PC.13 | bidirectional | Port C bit 13, I2C clock (SCL) or external interrupt INT3; TTL input, 5 V tolerant. |
| 44 | PC.14 | bidirectional | Port C bit 14, I2C data (SDA) or PWM main output / capture input / event input TMR3; TTL input, 5 V tolerant. |
| 45 | PA.0 | bidirectional | Port A bit 0, SPI2 chip select (SPI2_CS) or PWM main output / capture input / event input TMR1. |
| 46 | PA.1 | bidirectional | Port A bit 1, SPI2 clock (SPI2_CLK) or PWM output / capture input / event input TMR4. |
| 47 | PA.2 | bidirectional | Port A bit 2, SPI2 master-in/slave-out (SPI2_MISO) or UART3 receive (RX3). |
| 48 | PA.3 | bidirectional | Port A bit 3, SPI2 master-out/slave-in (SPI2_MOSI) or UART3 transmit (TX3). |
| 49 | PA.5 | bidirectional | Port A bit 5, energy metering pulse output 0 (PFOUT0) or external interrupt INT8, with 2 us input filter. |
| 50 | PA.6 | bidirectional | Port A bit 6, external interrupt INT1; when TEST=0 this pin is fixed as the JTAGWDTEN function, and it supports high-current drive. |
| 51 | PE.3 | bidirectional | Port E bit 3, clock output CLKOUT or energy metering pulse output 4 (PFOUT4); TTL input. |
| 52 | PE.7 | bidirectional | Port E bit 7, external low-voltage detect input LVDIN0 (analog) or ADC input channel 5 (ADCIN5). |
| 53 | PB.13 | bidirectional | Port B bit 13, UART6 transmit (TX6) or SWD data I/O (SWIO); default function is SWIO. |
| 54 | PB.15 | bidirectional | Port B bit 15, UART6 receive (RX6) or SWD clock (SWCLK); default function is SWCLK. |
| 55 | TEST | input | Test pin, active low, with internal 10 kOhm pull-up and 2 us filter. |
| 56 | /RST | input | Reset input, active low, with internal approximately 88 kOhm pull-up and 2 us filter. |
| 57 | VDD1P5 | power_out | Internal digital 1.5 V output; requires external 0.1 uF filter capacitor. |
| 58 | DGND | power_in | Chip digital ground. |
| 59 | DVCC | power_in | Chip digital power supply input; requires external filter capacitors of 10 uF and 0.1 uF. |
| 60 | VTP3 | input | Temperature-sensing terminal channel 3 (TBS input). |
| 61 | VTP2 | input | Temperature-sensing terminal channel 2 (TBS input). |
| 62 | VTP1 | input | Temperature-sensing terminal channel 1 (TBS input). |
| 63 | VTP0 | input | Temperature-sensing terminal channel 0 (TBS input). |
| 64 | OSCO | output | 32 kHz external clock output, associated with the OSCI 32K oscillator pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | 钜泉光电 |
| Package | LQFP-64(10x10) |
| Category | Data Acquisition |
| Pins | 64 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| 输入电源 VCC (绝对最大额定) | VCC | 2 | | 5.5 | V | 输入电源引脚上的电压 | 535 |
| 输入电压 (数字引脚) | Vi | -0.3 | | | V | 所有的数字引脚 | 535 |
| ADC 输入极限电压 | Via | -0.3 | | 3 | V | 测试 ADC 引脚输入电压,高于此电压可能会导致该引脚损坏 | 535 |
| ADCBAT 输入极限电压 | Vib | -0.3 | | 5 | V | 测试 ADCBAT 引脚输入电压,高于此电压可能会导致该引脚损坏 | 535 |
| 存储温度 | Tstg | -65 | | 150 | ℃ | 芯片的极限存储温度 | 535 |
| 静态 ESD (HBM) | VESDhbm | -4000 | | 4000 | V | 芯片所有的引脚 | 535 |
| MM 静态 ESD | VESDmm | | | 400 | V | | 535 |
| 输入电流 (VCC 电源引脚) | Idd | | | 50 | mA | VCC 电源引脚 | 535 |
| 地上电流 (所有 GND 引脚) | Iss | | | 50 | mA | 所有 GND 引脚 | 535 |
| LRC 功耗 | Ilrc | 0.4 | 0.5 | 0.6 | uA | -45℃~85℃,VCC=5.0V | 535 |
| Flash 操作温度 | | -40 | | 105 | ℃ | | 537 |
| 输入电源 VCC (BOR 关闭) | VCC | 2 | 3.3 | 5.5 | V | 输入电源引脚上的电压,BOR 关闭 | 537 |
| 输入电源 VCC (BOR 开启) | VCC | 2 | 3.3 | 5.5 | V | 输入电源引脚上的电压,BOR 开启 | 537 |
| OSC 工作电压 | | 1.5 | | 5.5 | V | 工作温度-40℃~85℃ | 538 |
| PLL 工作电压 | | 1.5 | | 5.5 | V | 工作温度-40℃~85℃ | 538 |
| HRC 工作电压 | | 2 | | 5.5 | V | 工作温度-40℃~85℃ | 538 |
| 内部低频 RC 时钟频率 (Flrc) | Flrc | 20 | 32 | 60 | KHz | 工作温度-40℃~85℃ | 538 |
| LRC 工作电压 | | 1.5 | | 5.5 | V | 工作温度-40℃~85℃ | 539 |
| LBOR 复位阈值 上电翻转电压 | | 1.769 | | 2.1 | V | | 539 |
| LBOR 复位阈值 下点翻转电压 | | 1.2 | 1.648 | 1.95 | V | | 539 |
| VCC 检测模块功耗 | Ivccdet | | 17 | | uA | 常温,VCC=5.0V | 535 |
| BOR 检测模块功耗 | Ibor | | 6.8 | | uA | 常温,VCC=5.0V | 535 |
| LVDIN 检测模块功耗 | Ilvdin | | 5.6 | | uA | 常温,VCC=5.0V,单个通道开启 | 535 |
| HRC 功耗 | Ihrc | | 129 | | uA | 常温,VCC=5.0V | 535 |
| PLL 功耗 | Ipll | | 246 | | uA | 常温,VCC=5.0V | 535 |
| RTC 功耗(包括 TPS 分时) | Irtc | | 1.3 | | uA | | 535 |
| Hold 功耗 | Ihold | | 11.1 | | uA | | 536 |
| Sleep 功耗 | Isleep | | 3.7 | | uA | | 536 |
| Crystal32k 下运行功耗 | Irunosc | | 700 | | nA | | 536 |
| Flash 字节读取时间 | | | 40 | | ns | | 536 |
| Flash 字节写时间 | | | 20 | | us | | 536 |
| Flash 页擦除时间 | | | 2 | | ms | | 536 |
| Flash 全擦除时间 | | | 10 | | ms | | 536 |
| 大电流 IO 高电平输出电流 (Ioh1) | Ioh1 | | 12 | | mA | VCC=5V,I/O 口上输出高电压 Voh 降低到 0.9VCC,测试引脚为支持 source 大电流驱动的 IO | 537 |
| 高电平输出电流 (Ioh2) | Ioh2 | | 5 | | mA | VCC=5.0V,I/O 口上输出高电压 Voh 降低到 0.9VCC,除支持 source 大电流驱动 GPIO 及 PJx 以外的所有 GPIO 引脚 | 537 |
| 大电流 IO 低电平输出电流 (Iol1) | Iol1 | | 30 | | mA | VCC=5.0V,I/O 口上输出低电压 Vol 升高到 0.1VCC,测试引脚为支持大电流驱动的所有 GPIO 引脚 | 537 |
| 低电平输出电流 (Iol2) | Iol2 | | 5 | | mA | VCC=5.0V,I/O 口上输出低电压 Vol 降低到 0.1VCC,除支持大电流驱动的 GPIO 及 PJx 以外的所有 GPIO 引脚 | 537 |
| 输入上拉电阻 | Rpull | | 88 | | kΩ | VCC=5.0V,除 test 其余 GPIO 引脚 | 538 |
| 输入上拉电阻 (test 引脚) | Rpull | | 10 | | kΩ | VCC=5.0V,test 引脚 | 538 |
| 输入漏电流 | Iif | | 0.1 | | uA | IO 配置为输入,上拉关闭,引脚接 VCC 或 GND | 538 |
| 开漏输出漏电流 | Iod | | 0.1 | | uA | IO 配置为输出高,开漏开启,引脚接 GND | 538 |
| C-C jitter (PLL) | | | 469 | | ps | 常温 | 538 |
| PLL 环路倍频比 | | | 1344 | | | | 538 |
| 外部 32.768K 晶体时钟频率 (Fosc) | Fosc | | 32.768 | | KHz | *1 内封晶体类芯片,晶体型号 SC-32S | 538 |
| Fosc 起振时间 | | | 500 | | ms | | 538 |
| OSC 模块功耗 | | | 0.7 | | uA | | 538 |
| 内部高频 RC 时钟频率 (Fhrc) | Fhrc | | 20 | | MHz | | 538 |
| HRC C-C jitter | | | 140 | | ps | 常温 | 538 |
| HRC 起振时间 | | | 1.15 | | ms | | 538 |
| HRC 模块功耗 | | | 129.5 | | uA | | 538 |
| LRC 起振时间 | | | 41.15 | | us | | 539 |
| LRC 模块功耗 | | | 0.5 | | uA | | 539 |
| POR 上电复位阈值 | | | 1 | | V | | 539 |
| 最慢上电速率 | | | 1 | | V/ms | | 539 |
| 最快上电速率 | | | 14 | | V/ms | | 539 |
| LBOR 迟滞电压 | | | 124 | | mV | | 539 |
| LBOR 功耗 | | | 150 | | nA | | 539 |
## CAD (KiCad official)
- Symbol: `HT7627S`
- Footprint: `Package_QFP:LQFP-64_10x10mm_P0.5mm`
- 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files: `ht7627s-etched.step` / `ht7627s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ht7627s.step` / `ht7627s.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [钜泉光电 datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589785232980410368) (547 pp, sha256 `d64ac5e0798c99d9`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ht7627s-datasheet.pdf)