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HT7540-1

UMW · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89

HT7540-1 from UMW, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin of the LDO regulator, shared by the input and output paths.
2 VIN power_in Regulator input supply pin; the maximum input voltage is 30 V per the limit parameters.
3 VOUT power_out Regulated output pin; the output voltage is 3.0 V to 5.0 V depending on the model (7540 nominal 4.0 V, 3.88 V to 4.12 V).

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-89
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: HT7540-1
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89 (KiCad packages3D, STEP)
  • 3D model files: ht7540-1-etched.step / ht7540-1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht7540-1.step / ht7540-1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (15 pp, sha256 8a1946363b661b62, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF