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HT7533S-JSM

JSMSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

HT7533S-JSM from JSMSEMI, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Chip ground terminal.
2 VIN power_in Supply input terminal, absolute maximum input voltage 30 V.
3 VOUT power_out Regulated output terminal, 3.3 V (3.201 to 3.399 V) at VIN=5.5 V, IOUT=10 mA, with 100 mA typical output current.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: HT7533S-JSM
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: ht7533s-jsm-etched.step / ht7533s-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht7533s-jsm.step / ht7533s-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (7 pp, sha256 d926d141de25ce26, retrieved 2026-10-09, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF