main
Ray Publish 0.1.0 f051f15 8d ago
{
  "slug": "ht7135arwz",
  "version": "0.1.0",
  "type": "component",
  "description": "HTCSEMI Analog To Digital Converters (ADC), SOP-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "data acquisition",
    "ht7135arwz",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ht7135arwz.kicad_sym",
    "ht7135arwz.kicad_mod",
    "ht7135arwz.glb",
    "ht7135arwz.step",
    "ht7135arwz.lbr",
    "docs/hero.png",
    "docs/ht7135arwz-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ht7135arwz-hero.glb",
    "ht7135arwz-hero.overlay.json",
    "ht7135arwz-etched.glb"
  ],
  "component": {
    "mpn": "HT7135ARWZ",
    "manufacturer": "HTCSEMI",
    "package": "SOP-28-300mil",
    "pin_count": 28,
    "category": "Data Acquisition",
    "subcategory": "Analog To Digital Converters (ADC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588944595791462400",
    "parts": {
      "symbol": "ht7135arwz.kicad_sym",
      "footprint": "ht7135arwz.kicad_mod",
      "model_3d": "ht7135arwz-hero.glb",
      "model_3d_plain": "ht7135arwz-etched.glb",
      "model_3d_step": "ht7135arwz-etched.step",
      "model_3d_step_plain": "ht7135arwz.step",
      "lbr": "ht7135arwz.lbr"
    },
    "distributor_links": {
      "lcsc": "C2834488"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T06:46:41Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VCC–",
        "type": "power_in",
        "description": "Negative supply, recommended -3 V to -8 V (-5 V nominal) relative to ground."
      },
      {
        "number": "2",
        "name": "REF",
        "type": "input",
        "description": "Reference voltage input, positive with respect to ANLG COMMON, with Vref recommended at 1 V."
      },
      {
        "number": "3",
        "name": "ANLG COMMON",
        "type": "passive",
        "description": "Analog common, connected to internal IN- during auto-zero, deintegrate and zero-integrator phases, and tied to the same point as IN- where possible."
      },
      {
        "number": "4",
        "name": "INT OUT",
        "type": "output",
        "description": "Integrator output, connected to the integrating capacitor CINT (nominally 0.47 µF) and the rollover-correction diode."
      },
      {
        "number": "5",
        "name": "AUTO ZERO",
        "type": "passive",
        "description": "Auto-zero capacitor connection (typically 1 µF) that compensates offset voltages of the buffer, integrator and comparator."
      },
      {
        "number": "6",
        "name": "BUFF OUT",
        "type": "output",
        "description": "Buffer amplifier output, connected to the integrating resistor RINT."
      },
      {
        "number": "7",
        "name": "Cref–",
        "type": "passive",
        "description": "Reference capacitor negative terminal (typically 1 µF)."
      },
      {
        "number": "8",
        "name": "Cref+",
        "type": "passive",
        "description": "Reference capacitor positive terminal (typically 1 µF)."
      },
      {
        "number": "9",
        "name": "IN–",
        "type": "input",
        "description": "Differential analog input low, with input range from VCC- +1 V to VCC+ -0.5 V and typical leakage 1 pA."
      },
      {
        "number": "10",
        "name": "IN+",
        "type": "input",
        "description": "Differential analog input high, with input range from VCC- +1 V to VCC+ -0.5 V and typical leakage 1 pA."
      },
      {
        "number": "11",
        "name": "VCC+",
        "type": "power_in",
        "description": "Positive supply, 4 V to 6 V (5 V nominal)."
      },
      {
        "number": "12",
        "name": "D5",
        "type": "output",
        "description": "Digit-drive output for the most significant digit, goes high for 200 clock pulses in the scan sequence."
      },
      {
        "number": "13",
        "name": "B1",
        "type": "output",
        "description": "Multiplexed BCD output bit 1 (LSB), TTL-compatible."
      },
      {
        "number": "14",
        "name": "B2",
        "type": "output",
        "description": "Multiplexed BCD output bit 2, TTL-compatible."
      },
      {
        "number": "15",
        "name": "B4",
        "type": "output",
        "description": "Multiplexed BCD output bit 4, TTL-compatible."
      },
      {
        "number": "16",
        "name": "B8",
        "type": "output",
        "description": "Multiplexed BCD output bit 8 (MSB), TTL-compatible."
      },
      {
        "number": "17",
        "name": "D4",
        "type": "output",
        "description": "Digit-drive output for the second digit, goes high for 200 clock pulses in the scan sequence."
      },
      {
        "number": "18",
        "name": "D3",
        "type": "output",
        "description": "Digit-drive output for the third digit, goes high for 200 clock pulses in the scan sequence."
      },
      {
        "number": "19",
        "name": "D2",
        "type": "output",
        "description": "Digit-drive output for the fourth digit, goes high for 200 clock pulses in the scan sequence."
      },
      {
        "number": "20",
        "name": "D1",
        "type": "output",
        "description": "Digit-drive output for the least significant digit, goes high for 200 clock pulses in the scan sequence."
      },
      {
        "number": "21",
        "name": "BUSY",
        "type": "output",
        "description": "Goes high at the start of signal integrate and stays high until the first clock pulse after zero crossing, or until end of the cycle on over-range."
      },
      {
        "number": "22",
        "name": "CLK",
        "type": "input",
        "description": "Clock input from 0 V to VCC+, with VIH 2.8 V min, VIL 0.8 V max and operating frequency up to 2 MHz."
      },
      {
        "number": "23",
        "name": "POLARITY",
        "type": "output",
        "description": "Polarity output, high for a positive input signal, updated at the start of each deintegrate phase."
      },
      {
        "number": "24",
        "name": "DGTL GND",
        "type": "power_in",
        "description": "Digital ground, whose return currents should not be sent to the analog ground line."
      },
      {
        "number": "25",
        "name": "RUN/HOLD",
        "type": "input",
        "description": "When high or open, measurements run continuously every 40,002 clock pulses; when low, the reading is held, and a positive pulse over 300 ns starts a new cycle."
      },
      {
        "number": "26",
        "name": "STROBE",
        "type": "output",
        "description": "Negative-going pulses transfer BCD data to external latches, UARTs or microprocessors, with the pulse low for 1/2 clock width."
      },
      {
        "number": "27",
        "name": "OVER RANGE",
        "type": "output",
        "description": "Goes high after BUSY goes low at the end of a cycle when an over-range condition occurs."
      },
      {
        "number": "28",
        "name": "UNDER RANGE",
        "type": "output",
        "description": "Goes high at the end of BUSY when the conversion is at or below 9% of full scale (count of 1800)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package mapping is inferred: the ordering table lists HT7135ANZ under the plastic DIP (N) column and; The pin-number-to-name assignment was reconstructed from the flattened text of the top-view drawing ; STROBE is listed under the heading 'STROBE input' in the datasheet, but its behavior (it goes high f",
          "10/28 pins cited to the wrong page (name found elsewhere): ['7:Cref–@p9', '8:Cref+@p9', '13:B1@p9', '16:OVER RANGE@p8']"
        ],
        "pages_sent": 12,
        "cost_usd": 0.0944,
        "at": "2026-10-19T06:44:23"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588944595791462400",
        "pages": 12,
        "sha256": "b863401b8486350e",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 28,
        "described": 28,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ht7135arwz.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          11.636,
          18.16,
          2.666
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "ecc34510e8f74b6103a72c2f24133ad80006c738972a56531d1221b277fcecdb",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ht7135arwz-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          11.636,
          18.16,
          2.666
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "312b675acd42f1efaab4b5e3b55903be716975fa235465ce9eb4a36b92b1bde0",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}