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Contents

README

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HT7039S

UMW · Supervisor and Reset ICs · SOT-23

HT7039S from UMW, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Chip output. NMOS open-drain detector output; pulls low when VDD falls below VDET (3.9V typ). Requires an external pull-up resistor (Rp) to VCC. IOL = 4mA min / 6mA typ at VOUT=0.2V.
3 VDD power_in Chip input / supply voltage. Operating range 1.5V-12V; absolute max 15V. The voltage monitored against the internal reference (VDET = 3.9V typ for HT7039).
2 GND power_in Chip ground reference (0V).

Key specifications

Parameter Value
Manufacturer UMW
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • HT7039SS

CAD (KiCad official)

  • Symbol: HT7039S
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ht7039s-etched.step / ht7039s-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ht7039s.step / ht7039s.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (12 pp, sha256 ca4a5b03cf717e3e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF